參數(shù)資料
型號： DS26504LN+
廠商： Maxim Integrated Products
文件頁數(shù)： 105/129頁
文件大?。?/td> 0K
描述： IC T1/E1/J1 64KCC ELEMENT 64LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 160
功能： BITS 元件
接口： 64KCC，E1，T1
電路數(shù)： 1
電源電壓： 3.14 V ~ 3.47 V
電流 - 電源： 150mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
包括： *
DS26504 T1/E1/J1/64KCC BITS Element
77 of 129
12.2 Alternate Sa/Si Bit Access Based on Double-Frame
On the receive side, the RAF and RNAF registers will always report the data as it received in the Sa and
Si bit locations. The RAF and RNAF registers are updated on align frame boundaries. The setting of the
receive align frame bit in status register 4 (SR4.0) will indicate that the contents of the RAF and RNAF
have been updated. The host can use the SR4.0 bit to know when to read the RAF and RNAF registers.
The host has 250
μs to retrieve the data before it is lost.
On the transmit side, data is sampled from the TAF and TNAF registers with the setting of the transmit
align frame bit in status register 4 (SR4.3). The host can use the SR4.3 bit to know when to update the
TAF and TNAF registers. It has 250
μs to update the data or else the old data will be retransmitted. If the
TAF and TNAF registers are only being used to source the align frame and non-align frame-sync
patterns, then the host need only write once to these registers. Data for the Si bit can come from the Si
bits of the RAF and TNAF registers, the TsiAF and TSiNAF registers, or passed through from the TSER
pin.
Register Name:
RAF
Register Description:
Receive Align Frame Register
Register Address:
56h
Bit #
7
6
5
4
3
2
1
0
Name
Si
FAS6
FAS5
FAS4
FAS3
FAS2
FAS1
FAS0
Default
0
HW
Mode
X
Bit 0: Frame Alignment Signal Bit 0 (FAS0). In normal operation this bit will be = 1.
Bit 1: Frame Alignment Signal Bit 1 (FAS1). In normal operation this bit will be = 1.
Bit 2: Frame Alignment Signal Bit 2 (FAS2). In normal operation this bit will be = 0.
Bit 3: Frame Alignment Signal Bit 3 (FAS3). In normal operation this bit will be = 1.
Bit 4: Frame Alignment Signal Bit 4 (FAS4). In normal operation this bit will be = 1.
Bit 5: Frame Alignment Signal Bit 5 (FAS5). In normal operation this bit will be = 0.
Bit 6: Frame Alignment Signal Bit 6 (FAS6). In normal operation this bit will be = 0.
Bit 7: International Bit (Si)
相關(guān)PDF資料
PDF描述
DS21352G IC TXRX T1 1-CHIP 3.3V 100-BGA
DS2174QN+T&R IC BERT ENHANCED 44-PLCC
DS2155GNC2+T&R TXRX T1/E1/J1 SGL 100CSBGA
DS2155GNC2+ IC TXRX T1/E1/J1 100-CSBGA
DS2155GN IC TXRX T1/E1/J1 1-CHIP 100CSBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS26504LN+ 功能描述:計時器和支持產(chǎn)品 E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
DS26504LN+T&R 制造商:Maxim Integrated Products 功能描述:T1/E1/J1 ENH BITS IC LQFP LF T&R - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC T1/E1/J1 64KCC ELEMENT 64LQFP
DS26504LN+T&R 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS26504LNB2 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS26504LNB2+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*