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參數(shù)資料
| 型號： | DS3134 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PBGA256 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 27/203頁 |
| 文件大?。?/td> | 777K |
| 代理商： | DS3134 |
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DS3134
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DMA Linking of Packets (Horizontal Link Listing)
The transmit DMA also has the ability to link packets together. Internally, the transmit DMA can store up
to two packets chains but if the Host places more packet chains into the Pending Queue, then the transmit
DMA must begin linking these chains together externally. The transmit DMA does this by writing to
Packet Descriptors. As an example, see Figure 8.2.1C. If columns 1 and 2 were the only two packet
chains queued for transmission, then the transmit DMA would not need to begin linking packet chains
together but as soon as column 3 was queued for transmission, the transmit DMA had to store the third
chain externally because it had no more room internally. The transmit DMA links the packet chain in the
third column to the one in the second column by writing the 1st descriptor of the third chain in the Next
Pending Descriptor Pointer field of the 1st descriptor of the second column (it also sets the PV bit to one).
As shown in Figure 8.2.1C, this chaining was carried one step farther to link the forth column to the third.
Priority Packets
The Host has the option to change the order in which packets are transmitted by the DMA. If the Host
sets the Priority Packet (PRI) bit in the Pending Queue Descriptor to a one, then the transmit DMA knows
that this packet is a priority packet and should be transmitted ahead of all standard packets. The rules for
packet transmission are:
1. Priority packets will be transmitted as soon as the current standard packet (not packet chain) finishes
transmission.
2. All priority packets will be transmitted before any more standard packets are transmitted.
3. Priority packets are ordered on a first come, first served basis.
Figure 8.2.1D provides an example of a set of priority packets interrupting a set of standard packets. In
the example, the first priority packet chain (shown in column 2) was read by the transmit DMA from the
Pending Queue while it was transmitting standard packet #1. It waited until standard packet #1 was
complete and then begins sending the priority packets. While column 2 was being sent, the priority
packet chains of columns 3 and 4 arrived in the Pending Queue so the transmit DMA linked column four
to column three and then waited until all of the priority packets were transmitted before returning to the
standard packet chain in column 1. Note that the packet chain in column 1 was interrupted to transmit the
priority packets.
In other words, the transmit DMA did not wait for the complete packet to finish
transmitting, only the current packet.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS-313PIN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Miscellaneous |
| DS-313-PIN | 功能描述:信號調(diào)節(jié) RoHS:否 制造商:EPCOS 產(chǎn)品:Duplexers 頻率:782 MHz, 751 MHz 頻率范圍: 電壓額定值: 帶寬: 阻抗:50 Ohms 端接類型:SMD/SMT 封裝 / 箱體:2.5 mm x 2 mm 工作溫度范圍:- 30 C to + 85 C 封裝:Reel |
| DS31400 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter |
| DS31400DK | 功能描述:時鐘和定時器開發(fā)工具 DS31400 Dev Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| DS31400GN | 功能描述:計時器和支持產(chǎn)品 Not Available From Mouser RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
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