參數(shù)資料
型號: DS3234S#
廠商: Maxim Integrated Products
文件頁數(shù): 20/21頁
文件大?。?/td> 0K
描述: IC RTC W/TCXO 20-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 45
類型: 時鐘/日歷
特點: 警報器,閏年,NVSRAM,方波輸出,TCXO/晶體
存儲容量: 256B
時間格式: HH:MM:SS(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: SPI
電源電壓: 2 V ~ 5.5 V
電壓 - 電源,電池: 2 V ~ 3.8 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC W
包裝: 管件
產(chǎn)品目錄頁面: 1434 (CN2011-ZH PDF)
DS3234
Extremely Accurate SPI Bus RTC with
Integrated Crystal and SRAM
8
_____________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
CS
Active-Low Chip Select Input. Used to select or deselect the device.
2, 7–14
N.C.
No Connection. Not connected internally. Must be connected to ground.
3
32kHz
32kHz Push-Pull Output. If disabled with either EN32kHz = 0 or BB32kHz = 0, the state of the 32kHz pin will be
low.
4VCC
DC Power Pin for Primary Power Supply. This pin should be decoupled using a 0.1F to 1.0F capacitor.
5
INT/SQW
Active-Low Interrupt or Square-Wave Output. This open-drain pin requires an external pullup resistor. It can be
left open if not used. This multifunction pin is determined by the state of the INTCN bit in the Control Register
(0Eh). When INTCN is set to logic 0, this pin outputs a square wave and its frequency is determined by RS2
and RS1 bits. When INTCN is set to logic 1, then a match between the timekeeping registers and either of the
alarm registers activates the INT/SQW pin (if the alarm is enabled). Because the INTCN bit is set to logic 1
when power is first applied, the pin defaults to an interrupt output with alarms disabled. The pullup voltage can
be up to 5.5V, regardless of the voltage on VCC. If not used, this pin can be left unconnected.
6
RST
Active-Low Reset. This pin is an open-drain input/output. It indicates the status of VCC relative to the
VPF specification. As VCC falls below VPF, the RST pin is driven low. When VCC exceeds VPF, for tRST, the RST
pin is driven high impedance. The active-low, open-drain output is combined with a debounced pushbutton
input function. This pin can be activated by a pushbutton reset request. It has an internal 50k_ nominal value
pullup resistor to VCC. No external pullup resistors should be connected. On first power-up, or if the crystal
oscillator is disabled, tRST is bypassed and RST immediately goes high.
15
GND
Ground
16
VBAT
Backup Power-Supply Input. If VBAT is not used, connect to ground. Diodes placed in series between the VBAT
pin and the battery can cause improper operation. UL recognized to ensure against reverse charging when
used with a lithium battery. Go to www.maxim-ic.com/qa/info/ul.
17
DIN
SPI Data Input. Used to shift address and data into the device.
18, 20
SCLK
SPI Clock Input. Used to control timing of data into and out of the device. Either clock polarity can be used. The
clock polarity is determined by the device based on the state of SCLK when CS goes low. Pins 18 and 20 are
electrically connected together internally.
19
DOUT
SPI Data Output. Data is output on this pin when the device is in read mode; CMOS push-pull driver.
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