(VDD
參數(shù)資料
型號(hào)： DS3253N#
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 42/71頁(yè)
文件大?。?/td> 0K
描述： IC LIU DS3/E3/STS-1 144-CSBGA
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 160
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 3/3
規(guī)程： IEEE 1149.1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 144-BGA，CSPBGA
供應(yīng)商設(shè)備封裝： 144-TECSBGA（13x13）
包裝： 管件
DS3251/DS3252/DS3253/DS3254
47 of 71
Table 17-D. Receiver Input Characteristics—DS3 and STS-1 Modes
(VDD = 3.3V ±5%, TA = -40°C to +85°C.)
PARAMETER
MIN
TYP
MAX
UNITS
Receive Sensitivity (Length of Cable)
900
1200
ft
Signal-to-Noise Ratio, Interfering Signal Test (Notes 1, 2)
10
Input Pulse Amplitude, RMON = 0 (Notes 2, 3)
1000
mVpk
Input Pulse Amplitude, RMON = 1 (Note 2, 3)
200
mVpk
Analog LOS Declare, RMON = 0 (Note 4)
-24
dB
Analog LOS Clear, RMON = 0 (Note 4)
-21
dB
Analog LOS Declare, RMON = 1 (Note 4)
-38
dB
Analog LOS Clear, RMON = 1 (Note 4)
-35
dB
Intrinsic Jitter Generation (Note 2)
0.03
UIP-P
Note 1:
An interfering signal (2
15 - 1 PRBS, B3ZS encoded, compliant waveshape, nominal bit rate) is added to the input signal. The
combined signal is passed through 0 to 900 feet of coaxial cable and presented to the DS325x receiver. This spec indicates the
lowest signal-to-noise ratio that results in a bit error ratio
≤10-9.
Note 2:
Not tested during production test.
Note 3:
Measured on the line side (i.e., the BNC connector side) of the 1:2 receive transformer (Figure 2-1). During measurement,
incoming data traffic is unframed 2
15 - 1 PRBS.
Note 4:
With respect to nominal 800mVpk signal.
Table 17-E. Receiver Input Characteristics—E3 Mode
(VDD = 3.3V ±5%, TA = -40°C to +85°C.)
PARAMETER
MIN
TYP
MAX
UNITS
Receive Sensitivity (Length of Cable)
900
1200
ft
Signal-to-Noise Ratio, Interfering Signal Test (Notes 1, 2)
12
Input Pulse Amplitude, RMON = 0 (Notes 2, 3)
1300
mVpk
Input Pulse Amplitude, RMON = 1 (Notes 2, 3)
260
mVpk
Analog LOS Declare, RMON = 0 (Note 4)
-24
dB
Analog LOS Clear, RMON = 0 (Note 4)
-21
dB
Analog LOS Declare, RMON = 1 (Note 4)
-38
dB
Analog LOS Clear, RMON = 1 (Note 4)
-35
dB
Intrinsic Jitter Generation (Note 2)
0.03
UIP-P
Note 1:
An interfering signal (2
23 - 1 PRBS, HDB3 encoded, compliant waveshape, nominal bit rate) is added to the input signal. The
combined signal is passed through 0 to 900 feet of coaxial cable and presented to the DS325x receiver. This spec indicates the
lowest signal-to-noise ratio that results in a bit error ratio
≤10-9.
Note 2:
Not tested during production test.
Note 3:
Measured on the line side (i.e., the BNC connector side) of the 1:2 receive transformer (Figure 2-1). During measurement,
incoming data traffic is unframed 2
23 - 1 PRBS.
Note 4:
With respect to nominal 1000mVpk signal.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS3253N# 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3253N+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3253NA3 制造商:Maxim Integrated Products 功能描述:DS3253 REV A3 - Rail/Tube
DS3254 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3254+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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