參數(shù)資料
型號: DS4302Z-020+
廠商: Maxim Integrated Products
文件頁數(shù): 3/8頁
文件大?。?/td> 0K
描述: IC DAC 5-BIT SGL 0-2.0V 8-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 100
設(shè)置時間: 10µs
位數(shù): 5
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極
采樣率(每秒): *
DS4302
2-Wire, 5-Bit DAC with Three Digital Outputs
_____________________________________________________________________
3
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SCL Clock Frequency
fSCL
0
400
kHz
Bus Free Time Between STOP
and START Conditions
tBUF
1.3
s
Low Period of SCL
tLOW
1.3
s
High Period of SCL
tHIGH
0.6
s
Data Hold Time
tHD:DAT
0
0.9
s
Data Setup Time
tSU:DAT
100
ns
Start Setup Time
tSU:STA
0.6
s
SDA and SCL Rise Time
tR
(Note 5)
20 + 0.1CB
300
ns
SDA and SCL Fall Time
tF
(Note 5)
20 + 0.1CB
300
ns
Stop Setup Time
tSU:STO
0.6
s
SDA and SCL Capacitive
Loading
CB
(Note 5)
400
pF
AC ELECTRICAL CHARACTERISTICS (Figure 3)
(VCC = +4.5V to 5.5V, TA = -40°C to +85°C, timing referenced to VIL(MAX) and VIH(MIN).)
Note 1: All voltages referenced to ground.
Note 2: ISTBY specified for the inactive state measured with SDA = SCL = VCC and with VOUT, P0, P1, and P2 floating.
Note 3: No load on VOUT.
Note 4: The DS4302 will not obstruct the SDA and SCL lines if VCC is switched off as long as the voltages applied to these inputs
does not violate their min and max input-voltage levels.
Note 5: CB—total capacitance of one bus line in picofarads.
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