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參數(shù)資料
| 型號(hào)： | DS5000T/KIT |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT IC EVALUATION MPU/RTC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 微控制器 |
| 適用于相關(guān)產(chǎn)品： | DS5000 |
| 所含物品： | 演示板和軟件 |
DS5000(T)
3 of 19
PIN DESCRIPTION
PIN
NAME
FUNCTION
1–8
P1.0–P1.7
General-Purpose I/O Port 1
9
RST
Active-High Reset Input. A logic 1 applied to this pin will activate a reset state.
This pin is pulled down internally so this pin can be left unconnected if not used.
10
P3.0/RXD
General-Purpose I/O Port Pin 3.0/Receive Signal for On-Board UART. This pin
should not be connected directly to a PC COM port.
11
P3.1/TXD
General-Purpose I/O Port Pin 3.1/Transmit Signal for On-Board UART. This pin
should not be connected directly to a PC COM port.
12
P3.2/
INT0
General-Purpose I/O Port Pin 3.2/Active-Low External Interrupt 0
13
P3.3/
INT1
General-Purpose I/O Port Pin 3.3/Active-Low External Interrupt 1
14
P3.4/T0
General-Purpose I/O Port Pin 3.4/Timer 0 Input
15
P3.5/T1
General-Purpose I/O Port Pin 3.5/Timer 1 Input
16
P3.6/
WR
General-Purpose I/O Port Pin 3.6/Active-Low Write Strobe for Expanded Bus
Operation
17
P3.7/
RD
General-Purpose I/O Port Pin 3.7/Active-Low Read Strobe for Expanded Bus
Operation
18, 19
XTAL2,
XTAL1
Crystal Connection. Used to connect an external crystal to the internal oscillator.
XTAL1 is the input to an inverting amplifier and XTAL2 is the output.
20
GND
Logic Ground
21–28
P2.0–P2.7/
A8–A15
General-Purpose I/O Port 2/MSB of the Expanded Address Bus
29
PSEN
Active-Low Program Store Enable. Used to enable an external program memory
when using the expanded bus. It is normally an output and should be unconnected
if not used.
PSEN also is used to invoke the bootstrap loader. At this time, PSEN is
pulled down externally. This should only be done once the DS5000(T) is already in
a reset state. The device that pulls down should be open drain since it must not
interfere with
PSEN under normal operation.
30
ALE
Address Latch Enable. Used to demultiplex the multiplexed expanded address/data
bus on Port 0. This pin is normally connected to the clock input on a ’373 type
transparent latch. When using a parallel programmer, this pin also assumes the
PROG function for programming pulses.
31
EA
Active-Low External Access. This pin forces the DS5000(T) to behave like an
8031. No internal memory (or clock) is available when this pin is at a logic low.
Since this pin is pulled down internally, it should be connected to +5V to use NV
RAM. In a parallel programmer, this pin also serves as VPP for super voltage
pulses.
32-39
P0.7–P0.0/
AD7–AD0
General-Purpose I/O Port 0/Multiplexed Expanded Address/Data Bus. This port is
open drain and cannot drive a logic 1. It requires external pullups. When used in
the multiplexed expanded address data/bus mode, this pin does not require pullups.
40
VCC
+5V Power Supply
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