參數(shù)資料
型號: DS80C320-ENG
廠商: Maxim Integrated Products
文件頁數(shù): 11/38頁
文件大小: 0K
描述: IC MCU HI SPEED 25MHZ IND 44TQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
產(chǎn)品變化通告: Product Discontinuation 20/Feb/2012
標(biāo)準(zhǔn)包裝: 160
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 25MHz
連通性: EBI/EMI,SIO,UART/USART
外圍設(shè)備: 電源故障復(fù)位,WDT
輸入/輸出數(shù): 32
程序存儲器類型: ROMless
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
19 of 38
Figure 4. Ring Oscillator Startup
TIMED ACCESS PROTECTION
Selected SFR bits are critical to operation, making it desirable to protect against an accidental write
operation. The Timed Access procedure prevents an errant CPU from accidentally altering a bit that
would cause difficulty. The Timed Access procedure requires that the write of a protected bit be preceded
by the following instructions:
MOV
0C7h, #0AAh
MOV
0C7h, #55h
By writing an AAh followed by a 55h to the Timed Access register (location C7h), the hardware opens a
three-cycle window that allows software to modify one of the protected bits. If the instruction that seeks
to modify the protected bit is not immediately proceeded by these instructions, the write will not take
effect. The protected bits are:
EXIF.0
BGS Bandgap Select
WDCON.6
POR Power-on Reset flag
WDCON.1
EWT Enable Watchdog
WDCON.0
RWT Reset Watchdog
WDCON.3
WDIF Watchdog Interrupt Flag
DIAGRAM ASSUMES THAT THE OPERATION FOLLOWING STOP REQUIRES LESS THAN 18ms COMPLETE.
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