參數(shù)資料
型號(hào): DS80C320-QNL/T&R
廠商: Maxim Integrated Products
文件頁數(shù): 17/38頁
文件大小: 0K
描述: IC MCU HI SPEED 33MHZ IND 44PLCC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 500
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 33MHz
連通性: EBI/EMI,SIO,UART/USART
外圍設(shè)備: 電源故障復(fù)位,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器類型: ROMless
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 帶卷 (TR)
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
24 of 38
MOVX CHARACTERISTICS—DS80C320
VARIABLE CLOCK
PARAMETER
SYMBOL
MIN
MAX
UNITS
STRETCH
2tCLCL-11
tMCS=0
RD
Pulse Width
tRLRH
tMCS-11
ns
tMCS>0
2tCLCL-11
tMCS=0
WR
Pulse Width
tWLWH
tMCS-11
ns
tMCS>0
2tCLCL-25
tMCS=0
RD
Low to Valid Data In
tRLDV
tMCS-25
ns
tMCS>0
Data Hold After Read
tRHDX
0
ns
tCLCL-5
tMCS=0
Data Float After Read
tRHDZ
2tCLCL-5
ns
tMCS>0
2.5tCLCL-27
tMCS=0
ALE Low to Valid Data In
tLLDV
1.5tCLCL-28+tMCS
ns
tMCS>0
3tCLCL-27
tMCS=0
Port 0 Address to Valid Data
In
tAVDV1
2tCLCL-31+tMCS
ns
tMCS>0
3.5tCLCL-32
tMCS=0
Port 2 Address to Valid Data
In
tAVDV2
2.5tCLCL-34+tMCS
ns
tMCS>0
0.5tCLCL-8
0.5tCLCL+6
tMCS=0
ALE Low to RD or WR Low
tLLWL
1.5tCLCL-7
1.5tCLCL+8
ns
tMCS>0
tCLCL-11
tMCS=0
Port 0 Address Valid to RD or
WR
Low
tAVWL1
2tCLCL-10
ns
tMCS>0
1.5tCLCL-9
tMCS=0
Port 2 Address Valid to RD or
WR
Low
tAVWL2
2.5tCLCL-13
ns
tMCS>0
-9
tMCS=0
Data Valid to WR Transition
tQVWX
tCLCL-10
ns
tMCS>0
tCLCL-12
tMCS=0
Data Hold After Write
tWHQX
2tCLCL-7
ns
tMCS>0
RD
Low to Address Float
tRLAZ
(Note 5)
ns
0
10
tMCS=0
RD
or WR High to ALE
High
tWHLH
tCLCL-5
tCLCL+11
ns
tMCS>0
Note: tMCS is a time period related to the Stretch memory cycle selection. The following table shows the value of
tMCS for each Stretch selection.
M2
M1
M0
MOVX CYCLES
tMCS
0
2 machine cycles
0
1
3 machine cycles (default)
4 tCLCL
0
1
0
4 machine cycles
8 tCLCL
0
1
5 machine cycles
12 tCLCL
1
0
6 machine cycles
16 tCLCL
1
0
1
7 machine cycles
20 tCLCL
1
0
8 machine cycles
24 tCLCL
1
9 machine cycles
28 tCLCL
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