參數(shù)資料
型號: DS80C320MCG
英文描述: (434.89 k)
中文描述: (434.89十一)
文件頁數(shù): 22/38頁
文件大小: 434K
代理商: DS80C320MCG
DS80C320/DS80C323
110196 22/38
AC ELECTRICAL CHARACTERISTICS UP TO 33 MHz
(0
°
C to 70
°
C; V
CC
=4.0V to 5.5V)
VARIABLE
CLOCK
MIN
MAX
PARAMETER
SYMBOL
33 MHz
MIN
33 MHz
MAX
VARIABLE
CLOCK
UNITS
Oscillator Frequency
1/t
CLCL
0
33
0
33
MHz
ALE Pulse Width
t
LHLL
35
1.5t
CLCL
–10
ns
Port 0 Address Valid to ALE Low
t
AVLL
4
.5t
CLCL
–11
ns
Address Hold After ALE Low
t
LLAX1
2
note 5
.25t
CLCL
–5
note 5
ns
Address Hold After ALE Low for
MOVX WR
t
LLAX2
8
.5t
CLCL
–7
ns
ALE Low to Valid Instruction In
t
LLIV
49
2.5t
CLCL
–27
ns
ALE Low to PSEN Low
t
LLPL
0.5
.25t
CLCL
–7
ns
PSEN Pulse Width
t
PLPH
61
2.25t
CLCL
–7
ns
PSEN Low to Valid Instr. In
t
PLIV
48
2.25t
CLCL
–21
ns
Input Instruction Hold After PSEN
t
PXIX
0
0
ns
Input Instruction Float After PSEN
t
PXIZ
25
t
CLCL
–5
ns
Port 0 Address to Valid Instr. In
t
AVIV1
64
3t
CLCL
–27
ns
Port 2 Address to Valid Instr. In
t
AVIV2
73
3.5t
CLCL
–33
ns
PSEN Low to Address Float
t
PLAZ
note 5
note 5
ns
NOTES FOR AC ELECTRICAL CHARACTERISTICS:
All parameters apply to both commercial and industrial temperature range operation unless otherwise noted.
1. All signals rated over operating temperature at 33 MHz.
2. All signals characterized with load capacitance of 80 pF except Port 0, ALE, PSEN, RD and WR at 100 pF.
Note that loading should be approximately equal for valid timing.
3. Interfacing to memory devices with float times (turn off times) over 30 ns may cause contention. This will not
damage the parts, but will cause an increase in operating current.
4. Specifications assume a 50% duty cycle for the oscillator. Port 2 timing will change with the duty cycle varia-
tions.
5. Address is held in a weak latch until over driven by external memory.
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相關代理商/技術參數(shù)
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