參數(shù)資料
型號: DS8113-JNG+
廠商: Maxim Integrated Products
文件頁數(shù): 2/17頁
文件大小: 0K
描述: IC INTERFACE SMART CARD 28-TSSOP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 241
應用: 智能卡
接口: 模擬
電源電壓: 2.7 V ~ 6 V
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 28-TSSOP
包裝: 管件
安裝類型: 表面貼裝
DS8113
If the card is in the reader (if PRES is active), the host
microcontroller can begin an activation sequence (start
a card session) by pulling CMDVCC low. The following
events form an activation sequence (Figure 3):
1) CMDVCC is pulled low.
2) The internal oscillator changes to high frequency (t0).
3) The voltage generator is started (between t0 and t1).
4) VCC rises from 0 to 5V, 3V, or 1.8V with a con-
trolled slope (t2 = t1 + 1.5
× T). T is 64 times the
internal oscillator period (approximately 25s).
5) I/O, AUX1, and AUX2 are enabled (t3 = t1 + 4T)
(they were previously pulled low).
6) The CLK signal is applied to the C3 contact (t4).
7) RST is enabled (t5 = t1 + 7T).
To apply the clock to the card interface:
1) Set RSTIN high.
2) Set CMDVCC low.
3) Set RSTIN low between t3 and t5; CLK will now start.
4) RST stays low until t5, then RST becomes the copy
of RSTIN.
5) RSTIN has no further effect on CLK after t5.
If the applied clock is not needed, set CMDVCC low
with RSTIN low. In this case, CLK starts at t3 (minimum
200ns after the transition on I/O, see Figure 4); after t5,
RSTIN can be set high to obtain an answer to request
(ATR) from an inserted smart card. Do not perform acti-
vation with RSTIN held permanently high.
Active Mode
When the activation sequence is completed, the
DS8113 card interface is in active mode. The host
microcontroller and the smart card exchange data on
the I/O lines.
Smart Card Interface
10
______________________________________________________________________________________
ATR
CMDVCC
RST
RSTIN
CLK
VCC
I/O
I/OIN
t0 t1
t2
t3
t4
t5 = tACT
Figure 3. Activation Sequence Using RSTIN and CMDVCC
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