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參數(shù)資料
| 型號： | DS89C21TMX |
| 元件分類： | 收發(fā)器 |
| 英文描述： | Transceiver |
| 中文描述： | 收發(fā)器 |
| 文件頁數(shù)： | 23/48頁 |
| 文件大小： | 934K |
| 代理商： | DS89C21TMX |
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DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers
23 of 48
Note:
The read/write accessibility of the flash memory during in-application programming is not affected by the
state of the lock bits. However, the lock bits do affect the read/write accessibility in ROM loader and parallel
programming modes.
In-Application Programming by User Software
The DS89C430 supports in-application programming of on-chip flash memory by user software. In-application
programming is initiated by writing a flash command into the flash control (FCNTL:D5h) register to enable the flash
memory for erase/program/verify operations. Address and data are input into the MMU through the flash data
(FDATA:D6h) register. The flash command also enables read/write accesses to the FDATA. The MMU’s sequencer
provides the operation sequences and control functions to the flash memory. The MMU is designed to operate
independently from the processor, except for read/write access to the SFRs.
Only the upper bank of the on-chip program memory can be in-application programmed by the user software. The
lower bank of the on-chip program memory contains system hardware-dependent codes that are crucial to system
operation and should not be altered during in-application programming.
All flash operations are self-timed. The user software can monitor the progress of an erase or programming
operation through the flash busy (FBUSY;FCNTL.7) bit with a reset value at logic 1. A selected operation
automatically starts when required data is written to the FDATA SFR. The MMU clears the FBUSY bit to indicate
the start of a write/erase operation. The FBUSY bit may not change state for up to 1 s after the operation is
requested. During this time, the application should poll the status of the FBUSY bit waiting for it to change state.
This bit is held low until either the end of the operation or until an error indicator is returned. A flash operating
failure terminates the current operation and sets the flash error flag (FERR;FCNTL.6) to logic 1. Both the busy and
error flags are read-only bits.
Read/write access during in-application programming is not affected by the state of the lock bits.
The flash command (FC3–FC0;FCNTL.3:0) bits provide flash commands as listed in
Table 4
.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS89C21TMX/NOPB | 功能描述:RS-422接口集成電路 RoHS:否 制造商:Texas Instruments 數(shù)據(jù)速率: 工作電源電壓:5 V 電源電流:35 mA 工作溫度范圍: 安裝風格:Through Hole 封裝 / 箱體:PDIP-16 封裝:Tube |
| DS89C386 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Twelve Channel CMOS Differential Line Receiver |
| DS89C386TMEA | 功能描述:總線接收器 RoHS:否 制造商:Texas Instruments 接收機數(shù)量:4 接收機信號類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
| DS89C386TMEA/NOPB | 功能描述:總線接收器 RoHS:否 制造商:Texas Instruments 接收機數(shù)量:4 接收機信號類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
| DS89C386TMEAX | 制造商:Texas Instruments 功能描述:Twelve Receiver RS-422 48-Pin SSOP T/R |
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