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參數(shù)資料
| 型號： | DS90LV031ATMTCX/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 19/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LINE DRIVER QUAD CMOS 16TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 驅(qū)動器 |
| 驅(qū)動器/接收器數(shù)： | 4/0 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | DS90LV031ATMTCX |
SNLS020C – JULY 1999 – REVISED APRIL 2013
Differential Traces
Use controlled impedance traces which match the differential impedance of your transmission medium (ie. cable)
and termination resistor. Run the differential pair trace lines as close together as possible as soon as they leave
the IC (stubs should be < 10mm long). This will help eliminate reflections and ensure noise is coupled as
common-mode. Lab experiments show that differential signals which are 1mm apart radiate far less noise than
traces 3mm apart since magnetic field cancellation is greater with the closer traces. Plus, noise induced on the
differential lines is much more likely to appear as common-mode which is rejected by the receiver.
Match electrical lengths between traces to reduce skew. Skew between the signals of a pair means a phase
difference between signals which destroys the magnetic field cancellation benefits of differential signals and EMI
will result. (Note the velocity of propagation, v = c/Er where c (the speed of light) = 0.2997mm/ps or 0.0118
in/ps). Do not rely solely on the auto-route function for differential traces. Carefully review dimensions to match
differential impedance and provide isolation for the differential lines. Minimize the number of vias and other
discontinuities on the line.
Avoid 90° turns (these cause impedance discontinuities). Use arcs or 45° bevels.
Within a pair of traces, the distance between the two traces should be minimized to maintain common-mode
rejection of the receivers. On the printed circuit board, this distance should remain constant to avoid
discontinuities in differential impedance. Minor violations at connection points are allowable.
Termination
Use a resistor which best matches the differential impedance of your transmission line. The resistor should be
between 90
and 130. Remember that the current mode outputs need the termination resistor to generate the
differential voltage. LVDS will not work without resistor termination. Typically, connect a single resistor across the
pair at the receiver end.
Surface mount 1% to 2% resistors are best. PCB stubs, component lead, and the distance from the termination
to the receiver inputs should be minimized. The distance between the termination resistor and the receiver
should be < 10mm (12mm MAX).
Probing LVDS Transmission Lines
Always use high impedance (> 100k
), low capacitance (< 2pF) scope probes with a wide bandwidth (1GHz)
scope. Improper probing will give deceiving results.
Cables and Connectors, General Comments
When choosing cable and connectors for LVDS it is important to remember:
Use controlled impedance media. The cables and connectors you use should have a matched differential
impedance of about 100
. They should not introduce major impedance discontinuities.
Balanced cables (e.g. twisted pair) are usually better than unbalanced cables (ribbon cable, simple coax.) for
noise reduction and signal quality. Balanced cables tend to generate less EMI due to field canceling effects and
also tend to pick up electromagnetic radiation as common-mode (not differential mode) noise which is rejected by
the receiver. For cable distances < 0.5M, most cables can be made to work effectively. For distances 0.5M
≤ d ≤
10M, CAT 3 (category 3) twisted pair cable works well, is readily available and relatively inexpensive.
Fail-safe of an LVDS Interface
If the LVDS link as shown in Figure 8 needs to support the case where the Line Driver is disabled, powered off,
or removed (un-plugged) and the Receiver device is powered on and enabled, the state of the LVDS bus is
unknown and therefore the output state of the Receiver is also unknown. If this is of concern, please consult the
respective LVDS Receiver data sheet for guidance on Failsafe Biasing options for the LVDS interface to set a
known state on the inputs for these conditions.
Copyright 1999–2013, Texas Instruments Incorporated
9
Product Folder Links: DS90LV031A
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