參數(shù)資料
型號: DSP56321VL275
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
元件分類: 數(shù)字信號處理
英文描述: 24-Bit Digital Signal Processor
中文描述: 24位數(shù)字信號處理器
文件頁數(shù): 45/84頁
文件大小: 898K
代理商: DSP56321VL275
AC Electrical Characteristics
DSP56321 Technical Data, Rev. 11
Freescale Semiconductor
2-25
Figure 2-24.
ESSI Transmitter Timing
Last Bit
See Note
Note:
In Network mode, output flag transitions can occur at the start of each time slot within the frame. In
Normal mode, the output flag state is asserted for the entire frame period.
First Bit
430
432
446
447
450
451
455
454
454
452
459
456
453
461
457
458
460
461
462
431
TXC
(Input/
Output)
FST (Bit)
Out
FST (Word)
Out
Data Out
Transmitter 0
Drive
Enable
FST (Bit) In
FST (Word)
In
Flags Out
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