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參數(shù)資料
| 型號： | DSP56366P |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 24-Bit Audio Digital Signal Processor |
| 中文描述： | 24位音頻數(shù)字信號處理器 |
| 文件頁數(shù)： | 14/110頁 |
| 文件大?。?/td> | 1273K |
| 代理商： | DSP56366P |
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DSP56366 Technical Data, Rev. 3.1
2-10
Freescale Semiconductor
HA2
Input
GPIO
disconnected
Host Address Input 2
—When the HDI08 is programmed to interface a
non-multiplexed host bus and the HI function is selected, this signal is line 2
of the host address (HA2) input bus.
HA9
Input
GPIO
disconnected
Host Address 9
—When HDI08 is programmed to interface a multiplexed
host bus and the HI function is selected, this signal is line 9 of the host
address (HA9) input bus.
PB10
Input, Output, or
Disconnected
GPIO
disconnected
Port B 10
—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
HRW
Input
GPIO
disconnected
Host Read/Write
—When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this signal is the
Host Read/Write (HRW) input.
HRD/
HRD
Input
GPIO
disconnected
Host Read Data
—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this signal is the
host read data strobe (HRD) Schmitt-trigger input. The polarity of the data
strobe is programmable, but is configured as active-low (HRD) after reset.
PB11
Input, Output, or
Disconnected
GPIO
disconnected
Port B 11
—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
HDS/
HDS
Input
GPIO
disconnected
Host Data Strobe—
When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this signal is the
host data strobe (HDS) Schmitt-trigger input. The polarity of the data strobe
is programmable, but is configured as active-low (HDS) following reset.
HWR/
HWR
Input
GPIO
disconnected
Host Write Data
—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this signal is the
host write data strobe (HWR) Schmitt-trigger input. The polarity of the data
strobe is programmable, but is configured as active-low (HWR) following
reset.
PB12
Input, output, or
disconnected
GPIO
disconnected
Port B 12
—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
HCS
Input
GPIO
disconnected
Host Chip Select—
When HDI08 is programmed to interface a
nonmultiplexed host bus and the HI function is selected, this signal is the
host chip select (HCS) input. The polarity of the chip select is
programmable, but is configured active-low (HCS) after reset.
Table 2-9 Host Interface (continued)
Signal Name
Type
State during
Reset
Signal Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56366UM | 24-Bit Audio Digital Signal Processor |
| DSP56367P | 24-Bit Audio Digital Signal Processor |
| DSP56367UM | 24-Bit Audio Digital Signal Processor |
| DSP56600 | Implementing Viterbi Decoders Using the VSL Instruction on DSP Families |
| DSP56852E | 16-bit Digital Signal Controllers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56366UM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56367 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| DSP56367P | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56367UM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor |
| DSP56371 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:high density CMOS device |
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