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參數(shù)資料
| 型號： | DSP56857E |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 5/53頁 |
| 文件大?。?/td> | 680K |
| 代理商： | DSP56857E |
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56857 Description
56857 Technical Data, Rev. 6
Freescale Semiconductor
5
* Each peripheral I/O can be used alternately as a General Purpose I/O if not needed
8-bit Parallel Host Interface*
Time of Day
Up to 47 GPIO
1.1.4
Energy Information
Fabricated in high-density CMOS with 3.3V, TTL-compatible digital inputs
Wait and Stop modes available
1.2 56857 Description
The 56857 is a member of the 56800E core-based family of controllers. It combines, on a single chip, the
processing power of a Digital Signal Processor (DSP) and the functionality of a microcontroller with a
flexible set of peripherals to create an extremely cost-effective solution. Because of its low cost,
configuration flexibility, and compact program code, the 56857 is well-suited for many applications. The
56857 includes many peripherals that are especially useful for low-end Internet appliance applications
and low-end client applications such as telephony; portable devices; Internet audio; and point-of-sale
systems, such as noise suppression; ID tag readers; sonic/subsonic detectors; security access devices;
remote metering; sonic alarms.
The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in
parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming
model and optimized instruction set allow straightforward generation of efficient, compact DSP and
control code. The instruction set is also highly efficient for C Compilers, enabling rapid development of
optimized control applications.
The 56857 supports program execution from either internal or external memories. Two data operands can
be accessed from the on-chip Data RAM per instruction cycle. The 56857 also provides two external
dedicated interrupt lines, and up to 47 General Purpose Input/Output (GPIO) lines, depending on
peripheral configuration.
The 56857 controller includes 40K words of Program RAM, 24K words of Data RAM and 1K of Boot
ROM.
This controller also provides a full set of standard programmable peripherals that include 8-bit parallel
Host Interface, Two Enhanced Synchronous Serial Interfaces (ESSI), one Serial Peripheral Interface (SPI),
two Serial Communications Interfaces (SCI), and one Quad Timer. The ESSIs, SPI, SCIs IO and Quad
Timer can be used as General Purpose Input/Outputs when its primary function is not required.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56858E | 16-bit Digital Signal Controllers |
| DSP56858FV120 | 16-bit Digital Signal Controllers |
| DSP56858FVE | 16-bit Digital Signal Controllers |
| DSP56858VF120 | 16-bit Digital Signal Controllers |
| DSP5685XEVMUM | Feature Phone Software Application Product Brief |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56857PB | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:120 MIPS Hybrid Processor |
| DSP56858 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56858E | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| DSP56858EVM | 制造商:Freescale Semiconductor 功能描述:Microprocessor Support IC For Use With:D |
| DSP56858EVMUM_D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP56858 Evaluation Module User＇s Manual |
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