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| 型號(hào)： | DSP56F827E |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號(hào)控制器 |
| 文件頁數(shù)： | 14/60頁 |
| 文件大?。?/td> | 811K |
| 代理商： | DSP56F827E |
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56F827 Technical Data, Rev. 12
14
Freescale Semiconductor
RD
15
Output
Read Enable
—RD is asserted during external memory read cycles. When RD
is asserted low, pins D0–D15 become inputs and an external device is
enabled onto the device data bus. When RD is deasserted high, the external
data is latched inside the device. When RD is asserted, it qualifies the
A0–A15, PS, and DS pins. RD can be connected directly to the OE pin of a
Static RAM or ROM.
WR
16
Output
Write Enable
—WR is asserted during external memory write cycles. When
WR is asserted low, pins D0–D15 become outputs and the device puts data on
the bus. When WR is deasserted high, the external data is latched inside the
external device. When WR is asserted, it qualifies the A0–A15, PS, and DS
pins. WR can be connected directly to the WE pin of a Static RAM.
TA0
(GPIOF0)
112
Input/Output
Input/Output
TA0–3
—Timer A Channels 0, 1, 2, and 3
Port F GPIO
—These four General Purpose I/O (GPIO) pins can be
individually programmed as input or output.
After reset, the default state is Quad Timer.
TA1
(GPIOF1)
111
TA2
(GPIOF2)
110
TA3
(GPIOF3)
109
TCK
44
Input
(Schmitt)
Test Clock Input
—This input pin provides a gated clock to synchronize the
test logic and shift serial data to the JTAG/OnCE port. The pin is connected
internally to a pull-down resistor.
TMS
46
Input
(Schmitt)
Test Mode Select Input
—This input pin is used to sequence the JTAG TAP
controller’s state machine. It is sampled on the rising edge of TCK and has an
on-chip pull-up resistor.
Note:
Always tie the TMS pin to V
DD
through a 2.2K resistor.
TDI
48
Input
(Schmitt)
Test Data Input
—This input pin provides a serial input data stream to the
JTAG/OnCE port. It is sampled on the rising edge of TCK and has an on-chip
pull-up resistor.
TDO
47
Input/Output
Test Data Output
—This tri-statable output pin provides a serial output data
stream from the JTAG/OnCE port. It is driven in the Shift-IR and Shift-DR
controller states, and changes on the falling edge of TCK.
TRST
45
Input
(Schmitt)
Test Reset
—As an input, a low signal on this pin provides a reset signal to the
JTAG TAP controller. To ensure complete hardware reset, TRST should be
asserted whenever RESET is asserted. The only exception occurs in a
debugging environment when a hardware device reset is required and it is
necessary not to reset the JTAG/OnCE module. In this case, assert RESET,
but do not assert TRST. TRST must always be asserted at power-up.
Note:
used in a debugging environment, TRST may be tied to V
SS
through a 1K resistor.
For normal operation, connect TRST directly to V
SS
. If the design is to be
DE
41
Output
Debug Event
—DE provides a low pulse on recognized debug events.
Table 2-2 56F827 Signal and Package Information for the 128 Pin LQFP (Continued)
Signal Name
Pin No.
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP56F827FG80 | 16-bit Digital Signal Controllers |
| DSP56F827FG80E | 16-bit Digital Signal Controllers |
| DSP56F827 | 16-bit Hybrid Controller(16位混合控制器) |
| DSP8-08AC | Phase-leg Rectifier Diode ISOPLUS220 |
| DSP8-08 | Phase-leg Rectifier Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F827E/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
| DSP56F827EVM | 制造商:Freescale Semiconductor 功能描述:Microprocessor Support IC For Use With:5 |
| DSP56F827EVMUM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56F827 Evaluation Module Hardware User＇s Manual |
| DSP56F827FG80 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 80Mhz/ 40MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSP56F827FG80E | 功能描述:16位微控制器 - MCU 80Mhz/40MIPS RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
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