參數(shù)資料
型號： DSPB56007FJ50
英文描述： DSP|24-BIT|CMOS|QFP|80PIN|PLASTIC
中文描述： 數(shù)字信號處理器| 24位|的CMOS | QFP封裝| 80腳|塑料
文件頁數(shù)： 9/83頁
文件大?。?/td> 382K
代理商： DSPB56007FJ50
Signal/Connection Descriptions
Power
MOTOROLA
DSP56007/D
1-3
POWER
GROUND
Table 1-2
Power Inputs
Power Name
Description
V
CCP
PLL Power
voltage should be well-regulated and the input should be provided with an
extremely low impedance path to the V
—V
CCP
provides isolated power for the Phase Lock Loop (PLL). The
CC
power rail.
V
CCQ
Quiet Power
input must be tied externally to all other chip power inputs. The user must provide
adequate external decoupling capacitors.
—V
CCQ
provides isolated power for the internal processing logic. This
V
CCA
Address Bus Power
I/ O drivers. This input must be tied externally to all other chip power inputs. The
user must provide adequate external decoupling capacitors.
—V
CCA
provides isolated power for sections of the address bus
V
CCD
Data Bus Power
—V
CCD
provides isolated power for sections of the data bus I/ O
drivers. This input must be tied externally to all other chip power inputs. The user
must provide adequate external decoupling capacitors.
V
CCS
Serial Interface Power
—V
CCS
provides isolated power for the SHI and SAI. This
input must be tied externally to all other chip power inputs. The user must provide
adequate external decoupling capacitors.
Table 1-3
Grounds
Ground Name
Description
GND
P
PLL Ground
—GND
P
is ground dedicated for PLL use. The connection should be
provided with an extremely low-impedance path to ground. V
CCP
should be
bypassed to GND
P
by a 0.47
μ
F capacitor located as close as possible to the chip
package.
GND
Q
Quiet Ground
—GND
Q
provides isolated ground for the internal processing logic.
This connection must be tied externally to all other chip ground connections. The
user must provide adequate external decoupling capacitors.
GND
A
Address Bus Ground
—GND
A
provides isolated ground for sections of the address
bus I/ O drivers. This connection must be tied externally to all other chip ground
connections. The user must provide adequate external decoupling capacitors.
GND
D
Data Bus Ground
—GND
D
provides isolated ground for sections of the data bus I/ O
drivers. This connection must be tied externally to all other chip ground
connections. The user must provide adequate external decoupling capacitors.
GND
S
Serial Interface Ground
—GND
S
provides isolated ground for the SHI and SAI. This
connection must be tied externally to all other chip ground connections. The user
must provide adequate external decoupling capacitors.
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