3-6
Universal Command Converter
Motorola
Host Computer Hardware
There are three input control bits in the middle-order byte of Port B data word that
represent the HOST_ACK, HOST_REQ, and INT_ACK. These signals are sent from the
host computer for reading and writing data. INT_ACK informs the monitor program that
the host computer has received its service request and is ready to communicate.
HOST_BRK is a wired-OR control line. HOST_BRK is used by the command converter
to inform the host computer whenever the target DSP has entered the Debug mode of
operation for non-JTAG devices only. Since more than one command converter may be
started for a user debug session, more than one may hold HOST_BRK active low at one
time. Once this signal is asserted it may only be deasserted by the host computer or by a
command converter reset.
3.1.5 Command Converter Interface Connector
The target application board must have a 14-pin connector to interface to the command
converter controller. This interface comprises nine signals and three ground connections
on a 7-row
×
2-column male pin header, which are spaced on 1/10 inch centers as
illustrated in Figure 3-4 on page 3-7.
Since the target system will have a resident reset circuit, it is recommended to have an
AND gate in series with the CC_RESET signal. This will insure that the target DSP will
be reset with a valid V
OL
level from either the target reset circuit or from the command
converter. The pull-down resistors are to insure that no false signals are propagated to the
JTAG/OnCE circuit when the test data input/debug serial input (TDI/DSI) and test data
clock/debug serial clock (TCK/DSCK) lines are active. The test data out/debug serial
output (TDO/DSO) pullup is to insure that the Debug Acknowledge signal from the OnCE
circuit is deasserted. The debug request (DR) pullup is to insure that the command
converter controls when the target DSP is placed into its Debug mode.