參數(shù)資料
型號： DSPIC30F1010-30I/MM
廠商： Microchip Technology
文件頁數(shù)： 5/66頁
文件大?。?/td> 0K
描述： IC DSPIC MCU/DSP 6K 28QFN
產(chǎn)品培訓模塊： Asynchronous Stimulus
特色產(chǎn)品： SMPS & Digital Power Conversion Solutions
標準包裝： 61
系列： dsPIC™ 30F
核心處理器： dsPIC
芯體尺寸： 16-位
速度： 30 MIP
連通性： I²C，IrDA，LIN，SPI，UART/USART
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 21
程序存儲器容量： 6KB（2K x 24）
程序存儲器類型： 閃存
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 6x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-VQFN 裸露焊盤
包裝： 管件
產(chǎn)品目錄頁面： 650 (CN2011-ZH PDF)
配用： DM300023-ND - KIT DEMO DSPICDEM SMPS BUCK
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
2010 Microchip Technology Inc.
DS70102K-page 13
dsPIC30F Flash Programming Specification
TABLE 5-7:
CONFIGURATION BITS DESCRIPTION
Bit Field
Register
Description
FWPSA<1:0> FWDT
Watchdog Timer Prescaler A
11 =1:512
10 =1:64
01 =1:8
00 =1:1
FWPSB<3:0> FWDT
Watchdog Timer Prescaler B
1111 =1:16
1110 =1:15
0001 = 1:2
0000 = 1:1
FWDTEN
FWDT
Watchdog Enable
1 = Watchdog enabled (LPRC oscillator cannot be disabled. Clearing the SWDTEN
bit in the RCON register will have no effect)
0 = Watchdog disabled (LPRC oscillator can be disabled by clearing the SWDTEN bit
in the RCON register)
MCLREN
FBORPOR
Master Clear Enable
1 = Master Clear pin (MCLR) is enabled
0 =MCLR pin is disabled
PWMPIN
FBORPOR
Motor Control PWM Module Pin Mode
1 = PWM module pins controlled by PORT register at device Reset (tri-stated)
0 = PWM module pins controlled by PWM module at device Reset (configured as out-
put pins)
HPOL
FBORPOR
Motor Control PWM Module High-Side Polarity
1 = PWM module high-side output pins have active-high output polarity
0 = PWM module high-side output pins have active-low output polarity
LPOL
FBORPOR
Motor Control PWM Module Low-Side Polarity
1 = PWM module low-side output pins have active-high output polarity
0 = PWM module low-side output pins have active-low output polarity
BOREN
FBORPOR
PBOR Enable
1 = PBOR enabled
0 = PBOR disabled
BORV<1:0>
FBORPOR
Brown-out Voltage Select
11 = 2.0V (not a valid operating selection)
10 = 2.7V
01 = 4.2V
00 = 4.5V
FPWRT<1:0> FBORPOR
Power-on Reset Timer Value Select
11 = PWRT = 64 ms
10 = PWRT = 16 ms
01 =PWRT = 4 ms
00 = Power-up Timer disabled
RBS<1:0>
FBS
Boot Segment Data RAM Code Protection (only present in dsPIC30F5011/5013/
6010A/6011A/6012A/6013A/6014A/6015)
11 = No Data RAM is reserved for Boot Segment
10 = Small-sized Boot RAM
[128 bytes of RAM are reserved for Boot Segment]
01 = Medium-sized Boot RAM
[256 bytes of RAM are reserved for Boot Segment]
00 = Large-sized Boot RAM
[512 bytes of RAM are reserved for Boot Segment in dsPIC30F5011/5013, and
1024 bytes in dsPIC30F6010A/6011A/6012A/6013A/6014A/6015]
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