TDLY
參數(shù)資料
型號(hào): DSPIC30F1010-30I/MM
廠商: Microchip Technology
文件頁(yè)數(shù): 55/66頁(yè)
文件大小: 0K
描述: IC DSPIC MCU/DSP 6K 28QFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
特色產(chǎn)品: SMPS & Digital Power Conversion Solutions
標(biāo)準(zhǔn)包裝: 61
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 30 MIP
連通性: I²C,IrDA,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 21
程序存儲(chǔ)器容量: 6KB(2K x 24)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-VQFN 裸露焊盤(pán)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 650 (CN2011-ZH PDF)
配用: DM300023-ND - KIT DEMO DSPICDEM SMPS BUCK
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
2010 Microchip Technology Inc.
DS70102K-page 59
dsPIC30F Flash Programming Specification
P9b
TDLY5
Delay between PGD
↓by programming
executive to PGD released by
programming executive
15
μs—
P10
TDLY6
Delay between PGD released by
programming executive to first PGC
↑ of
response
5—
μs—
P11
TDLY7
Delay between clocking out response
words
10
μs—
P12a
TPROG
Row Programming cycle time
1
4
ms
ICSP mode
P12b
TPROG
Row Programming cycle time
0.8
2.6
ms
Enhanced
ICSP mode
P13a
TERA
Bulk/Row Erase cycle time
1
4
ms
ICSP mode
P13b
TERA
Bulk/Row Erase cycle time
0.8
2.6
ms
Enhanced
ICSP mode
TABLE 13-1:
AC/DC CHARACTERISTICS (CONTINUED)
AC/DC CHARACTERISTICS
Standard Operating Conditions
(unless otherwise stated)
Operating Temperature: 25
° C is recommended
Param.
No.
Sym
Characteristic
Min
Max
Units
Conditions
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