參數(shù)資料
型號(hào): DSPIC30F4013-20I/P
廠商: Microchip Technology
文件頁(yè)數(shù): 17/153頁(yè)
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 48K 40DIP
產(chǎn)品培訓(xùn)模塊: Serial Communications using dsPIC30F CAN
Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標(biāo)準(zhǔn)包裝: 10
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: CAN,I²C,SPI,UART/USART
外圍設(shè)備: AC'97,欠壓檢測(cè)/復(fù)位,I²S,POR,PWM,WDT
輸入/輸出數(shù): 30
程序存儲(chǔ)器容量: 48KB(16K x 24)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大小: 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
配用: AC30F003-ND - MODULE SOCKET DSPIC30F 40DIP
ACICE0206-ND - ADAPTER MPLABICE 40P 600 MIL
其它名稱(chēng): DSPIC30F4013-20IP
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2010 Microchip Technology Inc.
DS70138G-page 113
dsPIC30F3014/4013
17.3
Modes of Operation
The CAN module can operate in one of several operation
modes selected by the user. These modes include:
Initialization mode
Disable mode
Normal Operation mode
Listen Only mode
Loopback mode
Error Recognition mode
Modes are requested by setting the REQOP<2:0> bits
(CiCTRL<10:8>). Entry into a mode is Acknowledged
by monitoring the OPMODE<2:0> bits (CiCTRL<7:5>).
The module does not change the mode and the
OPMODE bits until a change in mode is acceptable,
generally during bus Idle time which is defined as at
least 11 consecutive recessive bits.
17.3.1
INITIALIZATION MODE
In the Initialization mode, the module does not transmit
or receive. The error counters are cleared and the inter-
rupt flags remain unchanged. The programmer has
access to Configuration registers that are access
restricted in other modes. The module protects the user
from accidentally violating the CAN protocol through
programming errors. All registers that control the con-
figuration of the module can not be modified while the
module is on-line. The CAN module is not allowed to
enter the Configuration mode while a transmission is
taking place. The Configuration mode serves as a lock
to protect the following registers.
All Module Control registers
Baud Rate and Interrupt Configuration registers
Bus Timing registers
Identifier Acceptance Filter registers
Identifier Acceptance Mask registers
17.3.2
DISABLE MODE
In Disable mode, the module does not transmit or
receive. The module has the ability to set the WAKIF bit
due to bus activity, however, any pending interrupts
remain and the error counters retain their value.
If the REQOP<2:0> bits (CiCTRL<10:8>) = 001, the
module enters the Module Disable mode. If the module is
active, the module waits for 11 recessive bits on the CAN
bus, detects that condition as an Idle bus, and then
accepts the module disable command. When the
OPMODE<2:0>
bits
(CiCTRL<7:5>) = 001,
that
indicates whether the module successfully went into
Module Disable mode. The I/O pins revert to normal I/O
function when the module is in the Module Disable mode.
The module can be programmed to apply a low-pass
filter function to the CiRX input line while the module or
the CPU is in Sleep mode. The WAKFIL bit
(CiCFG2<14>) enables or disables the filter.
17.3.3
NORMAL OPERATION MODE
Normal
Operating
mode
is
selected
when
REQOP<2:0> = 000. In this mode, the module is acti-
vated and the I/O pins assume the CAN bus functions.
The
module
transmits
and
receives
CAN
bus
messages via the CxTX and CxRX pins.
17.3.4
LISTEN ONLY MODE
If the Listen Only mode is activated, the module on the
CAN bus is passive. The transmitter buffers revert to
the port I/O function. The receive pins remain inputs.
For the receiver, no error flags or Acknowledge signals
are sent. The error counters are deactivated in this
state. The Listen Only mode can be used for detecting
the baud rate on the CAN bus. To use this, it is neces-
sary that there are at least two further nodes that
communicate with each other.
17.3.5
LISTEN ALL MESSAGES MODE
The module can be set to ignore all errors and receive
any message. The Listen All Messages mode is acti-
vated by setting the REQOP<2:0> bits to ‘111’. In this
mode, the data which is in the message assembly buf-
fer until the time an error occurred, is copied in the
receive buffer and can be read via the CPU interface.
17.3.6
LOOPBACK MODE
If the Loopback mode is activated, the module
connects the internal transmit signal to the internal
receive signal at the module boundary. The transmit
and receive pins revert to their port I/O function.
Note:
Typically, if the CAN module is allowed to
transmit in a particular mode of operation
and a transmission is requested immedi-
ately after the CAN module has been
placed in that mode of operation, the mod-
ule waits for 11 consecutive recessive bits
on the bus before starting transmission. If
the user switches to Disable mode within
this 11-bit period, then this transmission is
aborted and the corresponding TXABT bit
is set and TXREQ bit is cleared.
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