參數(shù)資料
型號： DSPIC33FJ12GP202T-I/ML
廠商： Microchip Technology
文件頁數(shù)： 49/90頁
文件大小： 0K
描述： IC DSPIC MCU/DSP 12K 28QFN
產品培訓模塊： Asynchronous Stimulus
標準包裝： 1,600
系列： dsPIC™ 33F
核心處理器： dsPIC
芯體尺寸： 16-位
速度： 40 MIP
連通性： I²C，IrDA，SPI，UART/USART
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 21
程序存儲器容量： 12KB（12K x 8）
程序存儲器類型： 閃存
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉換器： A/D 10x12b
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-VQFN 裸露焊盤
包裝： 帶卷 (TR)
配用： AC164336-ND - MODULE SOCKET FOR PM3 28/44QFN
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
其它名稱： DSPIC33FJ12GP202T-I/MLTR
2005 Microchip Technology Inc.
Preliminary
DS70155C-page 51
dsPIC33F
Key features of the Digital Filter Design tool include:
Finite Impulse Response Filter Design
Design Method Selection
- FIR Windows Design
- FIR Equiripple Design (Parks-McClellan)
Low-Pass, High-Pass, Band-Pass and Band-Stop
Filters
FIR Filters can have up to 513 taps
The following window functions are supported:
- Rectangular
- Hanning (Hann)
- Hamming
- Triangular
-Blackman
- Exact Blackman
-3 Term Cosine
- 3 Term Cosine with Continuous 3rd Derivative
- Minimum 3 Term Cosine
-4 Term Cosine
- 4 Term Cosine with continuous 5th Derivative
- Minimum 4 Term Cosine
- Good 4 Term Blackman Harris
-Harris Flat Top
-Kaiser
- Dolph-Tschebyscheff
-Taylor
-Gaussian
Reports show design details, such as window
coefficients and impulse response prior to
multiplying by the window function
Infinite Impulse Response Filter Design
Low-Pass, High-Pass, Band-Pass and Band-Stop
Filters
Filter Orders up to 10 for Low-Pass and
High-Pass Filters
Filter Orders up to 20 for Band-Pass and
Band-Stop Filters
Five Analog Prototype Filters are available:
- Butterworth
- Tschebyscheff
- Inverse Tschebyscheff
- Elliptic
-Bessel
Digital Transformations are performed by Bilinear
Transformation Method
Reports show design details, such as all
transformations from normalized low-pass filter to
desired filter
Code Generation Features
Generated files are compliant with the Microchip
dsPIC33F C30 C Compiler, Assembler and Linker
Choice of placement of coefficients in Program
Space or Data Space
‘C’ Wrapper/Header Code Generation
Graphs
Magnitude Response vs. Frequency
Log Magnitude vs. Frequency
Phase Response vs. Frequency
Group Delay vs. Frequency
Impulse Response vs. Time (per sample)
Step Response vs. Time (per sample)
Pole and Zero Locations (IIR only)
11.6
Microchip TCP/IP Stack
The free Microchip TCP/IP Stack is a suite of programs
that can provide services to standard (HTTP Server,
Mail Client, etc.) or custom TCP/IP-based applications.
Users do not need to be an expert in TCP/IP
specifications to use it and only need specific
knowledge of TCP/IP in the accompanying HTTP
Server application.
This stack is implemented in a modular fashion, with all
of its services creating highly abstracted layers, each
layer accessing services from one or more layers
directly below it. The stack is optimized for size and is
designed
to
run
on
the
dsPIC33F
using
the
dsPICDEM.net Development Board; however, it can
be easily retargeted to any hardware equipped with a
dsPIC33F. HTML web pages generated by the
dsPIC33F can be viewed with a standard web browser
such as Microsoft Internet Explorer.
Key features of the Microchip TCP/IP Stack include:
Out-of-box support for Microchip C30 C Compiler
Implements complete TCP state machine
Multiple TCP and UDP sockets with simultaneous
connection/management
Includes modules supporting various standard
protocols: MAC, SLIP, ARP, IP, ICMP, TCP,
SNMP, UDP, DHCP, FTP, IP Gleaning, HTTP,
MPFS (Microchip File System)
Can be used as a part of the HTTP Server
(included) or any custom TCP/IP-based
application
RTOS independent
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