參數(shù)資料
型號(hào)： DSPIC33FJ12MC202-I/ML
廠商： Microchip Technology
文件頁數(shù)： 62/155頁
文件大?。?/td> 0K
描述： IC DSPIC MCU/DSP 12K 28QFN
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
特色產(chǎn)品： PIC24FJ/33FJ MCUs & dsPIC? DSCs
標(biāo)準(zhǔn)包裝： 61
系列： dsPIC™ 33F
核心處理器： dsPIC
芯體尺寸： 16-位
速度： 40 MIP
連通性： I²C，IrDA，SPI，UART/USART
外圍設(shè)備： 高級(jí)欠壓探測/復(fù)位，電機(jī)控制 PWM，QEI，POR，PWM，WDT
輸入/輸出數(shù)： 21
程序存儲(chǔ)器容量： 12KB（12K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 6x10b/12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-VQFN 裸露焊盤
包裝： 管件
產(chǎn)品目錄頁面： 651 (CN2011-ZH PDF)
配用： AC164336-ND - MODULE SOCKET FOR PM3 28/44QFN
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
2010 Microchip Technology Inc.
DS41303G-page 289
PIC18F2XK20/4XK20
21.0
VOLTAGE REFERENCES
There
are
two
independent
voltage
references
available:
Programmable Comparator Voltage Reference
1.2V Fixed Voltage Reference
21.1
Comparator Voltage Reference
The Comparator Voltage Reference module provides
an internally generated voltage reference for the com-
parators. The following features are available:
Independent from Comparator operation
Two 16-level voltage ranges
Output clamped to VSS
Ratiometric with VDD
1.2 Fixed Reference Voltage (FVR)
The CVRCON register (Register 21-1) controls the
Voltage Reference module shown in Figure 21-1.
21.1.1
INDEPENDENT OPERATION
The comparator voltage reference is independent of
the comparator configuration. Setting the CVREN bit of
the CVRCON register will enable the voltage reference
by allowing current to flow in the CVREF voltage divider.
When both the CVREN bit is cleared, current flow in the
CVREF voltage divider is disabled minimizing the power
drain of the voltage reference peripheral.
21.1.2
OUTPUT VOLTAGE SELECTION
The
CVREF voltage reference has 2 ranges with 16
voltage levels in each range. Range selection is
controlled by the CVRR bit of the CVRCON register.
The 16 levels are set with the CVR<3:0> bits of the
CVRCON register.
The CVREF output voltage is determined by the
following equations:
EQUATION 21-1:
CVREF OUTPUT VOLTAGE
The full range of VSS to VDD cannot be realized due to
the construction of the module. See Figure 21-1.
21.1.3
OUTPUT CLAMPED TO VSS
The CVREF output voltage can be set to Vss with no
power consumption by configuring CVRCON as
follows:
CVREN = 0
CVRR = 1
CVR<3:0> = 0000
This allows the comparator to detect a zero-crossing
while not consuming additional CVREF module current.
21.1.4
OUTPUT RATIOMETRIC TO VDD
The comparator voltage reference is VDD derived and
therefore, the CVREF output changes with fluctuations in
VDD. The tested absolute accuracy of the Comparator
Voltage Reference can be found in Section 26.0
21.1.5
VOLTAGE REFERENCE OUTPUT
The CVREF voltage reference can be output to the
device CVREF pin by setting the CVROE bit of the CVR-
CON register to ‘1’. Selecting the reference voltage for
output on the CVREF pin automatically overrides the
digital output buffer and digital input threshold detector
functions of that pin. Reading the CVREF pin when it
has been configured for reference voltage output will
always return a ‘0’.
Due to the limited current drive capability, a buffer must
be used on the voltage reference output for external
connections to CVREF. Figure 21-2 shows an example
buffering technique.
21.1.6
OPERATION DURING SLEEP
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
21.1.7
EFFECTS OF A RESET
A device Reset affects the following:
Comparator voltage reference is disabled
Fixed voltage reference is disabled
CVREF is removed from the CVREF pin
The high-voltage range is selected
The CVR<3:0> range select bits are cleared
CVRR
1 (low range):
=
CVRR
0 (high range):
=
CVREF = (CVRSRC/24) X CVR<3:0> + VREF-
CVRSRC
VDD
=
or [(VREF+) - (VREF-)]
CVREF = (CVRSRC/32) X (8 + CVR<3:0>) + VREF-
Note: VREF- is 0 when CVRSS = 0
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