參數(shù)資料
型號: DT28F016SA-150
廠商: INTEL CORP
元件分類: DRAM
英文描述: 28F016SA 16-MBIT (1 MBIT X 16, 2 MBIT X 8)FlashFile MEMORY
中文描述: 1M X 16 FLASH 12V PROM, 150 ns, PDSO56
封裝: 23.70 X 16 MM, 1.80 MM HEIGHT, SSOP-56
文件頁數(shù): 7/63頁
文件大?。?/td> 635K
代理商: DT28F016SA-150
E
1.0 INTRODUCTION
28F016SV FlashFile MEMORY
7
The documentation of the Intel 28F016SV memory
device includes this datasheet, a detailed user’s
manual, and a number of application notes and
design tools, all of which are referenced in
Appendix B.
The datasheet is intended to give an overview of
the chip feature-set and of the operating AC/DC
specifications. The
16-Mbit Flash Product Family
User’s Manual
provides complete descriptions of
the user modes, system interface examples and
detailed descriptions of all principles of operation.
It also contains the full list of software algorithm
flowcharts, and a brief section on compatibility
with the Intel 28F008SA.
A significant 28F016SV change occurred between
datasheet revisions 290528-003 and 290528-004.
This change centers around the addition of a 3/5#
pin to the device’s pinout configuration. Figures 2
and 3 show the 3/5# pin assignment for TSOP and
SSOP Type 1 packages. Intel recommends that all
customers obtain the latest revisions of 28F016SV
documentation.
1.1 Enhanced Features
The 28F016SV is backwards compatible with the
28F016SA and offers the following enhancements:
SmartVoltage Technology
Selectable
5V
or 12V V
PP
V
PP
Level Bit in Block Status Register
Additional RY/BY# Configuration
Pulse-On-Program/Erase
Additional Upload Device Information
Command Feedback
Device Proliferation Code
Device Configuration Code
1.2 Product Overview
The 28F016SV is a high-performance, 16-Mbit
(16,777,216-bit)
block
random access memory, organized as either
1 Mword x 16 or 2 Mbyte x 8. The 28F016SV
includes thirty-two 64-KB (65,536 byte) blocks or
thirty-two 32-KW (32,768 word) blocks. A chip
memory map is shown in Figure 4.
erasable,
nonvolatile
The implementation of a new architecture, with
many enhanced features, will improve the device
operating characteristics and result in greater
product reliability and ease-of-use.
The
technology, providing V
operation at both 3.3V
and
5V
and program and erase capability at V
=
12V or
5V
. Operating at V
= 3.3V, the
28F016SV consumes approximately one half the
power consumption at
5V
V
, while
5V
V
provides the highest read performance capability.
V
=
5V
operation eliminates the need for a
separate 12V converter, while V
= 12V
maximizes
program/erase
addition to the flexible program and erase
voltages, the dedicated V
PP
gives complete code
protection with V
PP
V
PPLK
.
28F016SV
incorporates
SmartVoltage
performance.
In
A 3/5# input pin configures the device’s internal
circuitry for optimal 3.3V or
5V
read/program
operation.
A Command User Interface (CUI) serves as the
system interface between the microprocessor or
microcontroller and the internal memory operation.
Internal Algorithm Automation allows byte/word
programs and block erase operations to be
executed
using
a
Two-Program
sequence to the CUI in the same way as the
28F008SA 8-Mbit FlashFile memory.
command
A super-set of commands has been added to the
basic 28F008SA command-set to achieve higher
program performance and provide additional
capabilities. These new commands and features
include:
Page Buffer Programs to Flash
Command Queuing Capability
Automatic Data Programs during Erase
Software Locking of Memory Blocks
Two-Byte
Successive
Systems
Erase All Unlocked Blocks
Programs
in
8-bit
Writing of memory data is performed in either byte
or word increments typically within 6 μs
(12V V
)—a 33% improvement
28F008SA. A block erase operation erases one of
the 32 blocks in typically 0.6 sec (12V V
),
independent of the other blocks, which is about a
65% improvement over the 28F008SA.
over the
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