28F016SV FlashFile MEMORY
E
4
REVISION HISTORY
Number
Description
-001
Original Version
-002
Added 28F016SV-065/-070 at 5V V
CC
and 28F016SV-075 at 3.3V V
CC
.
Improved burst write transfer rate to 30.8 MB/sec.
Added 56-lead SSOP Type I packaging information.
Changed V
PPLK
from 2V to 1.5V.
Increased I
CCR
at 5V V
and 3.3V V
CC
:
I
CCR1
from 30 mA (typ)/35 mA (max) to 40 mA (typ)/50 mA (max) @ V
CC
= 3.3V
I
CCR2
from 15 mA (typ)/20 mA (max) to 20 mA (typ)/30 mA (max) @ V
CC
= 3.3V
I
CCR1
from 50 mA (typ)/60 mA (max) to 75 mA (typ)/95 mA (max) @ V
CC
= 5V
I
CCR2
from 30 mA (typ)/35 mA (max) to 45 mA (typ)/55 mA (max) @ V
CC
= 5V
Moved AC Characteristics for Extended Register Reads into separate table.
Increased V
PP
MAX from 13V to 14V.
Added Erase Suspend Command Latency times to Section 5.12
Modified Device Nomenclature Section to include SSOP package option and Ordering
Information
Changed definition of
“NC.” Removed “No internal connection to die” from description.
Added “
xx
” to Upper Byte of Command (Data) Definition in Sections 4.3 and 4.4.
Added Note to Sleep Command (Section 4.4) denoting that the chip must be de-selected
in order for the power consumption in sleep mode to reach deep power-down
levels.
Modified parameters “V” and “I” of Section 5.1 to apply to “NC” pins.
Increased I
PPR
(V
PP
Read Current) for V
PP
> V
CC
to 200 μA at V
CC
= 3.3V and V
CC
=
5V
Changed V
=
5V
DC Characteristics (Section 5.5) marked with Note 1 to indicate
that these currents are specified for a CMOS rise/fall time (10% to 90%) of <5 ns
and a TTL rise/fall time of <10 ns.
Corrected the graphical representation of t
WHGL
and t
EHGL
in Figures 15 and 16.
Increased Typical “Page Buffer Byte/Word Program Times” from 6.0 μs to 8.0 μs (Byte)
and 12.1 μs to 16.0 μs (Word) @ V
CC
= 3.3V/
5V
and V
PP
=
5V
:
Increased Typ. “Byte/Word Program Times” (t
WHRH1A
/t
WHRH1B
) for V
PP
=
5V
(Section
5.12)
t
WHRH1A
from 16.5 μs to 29.0 μs and t
WHRH1B
from 24.0 μs to 35.0 μs at V
CC
=3.3V
t
WHRH1A
from 11.0 μs to 20.0 μs and t
WHRH1B
from 16.0 μs to 25.0 μs at V
CC
=
5V
Increased Typical “Block Program Times” (t
WHRH2
/t
WHRH3
)for V
=
5V
(Section 5.12):
t
WHRH2
from 1.1 sec to 1.9 sec and t
WHRH3
from 0.8 sec to 1.2 sec at V
CC
= 3.3V
t
WHRH2
from 0.8 sec to 1.4 sec and t
WHRH3
from 0.6 sec to 0.85 sec at V
CC
=
5V
Changed “Time from Erase Suspend Command to WSM Ready” spec name to “Erase
Suspend Latency Time to Read;” modified typical values and added Min/Max
values at V
CC
=3.3/
5V
and V
PP
=5V/12V (Section 5.12)
Added “Erase Suspend Latency Time to Program” Specifications to Section 5.12
Minor cosmetic changes throughout document
-003