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參數(shù)資料
| 型號： | DT28F800F3T95 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | FAST BOOT BLOCK FLASH MEMORY FAMILY 8 AND 16 MBIT |
| 中文描述： | 512K X 16 FLASH 2.7V PROM, 95 ns, PDSO56 |
| 封裝： | 16 X 23.70 MM, SSOP-56 |
| 文件頁數(shù)： | 16/47頁 |
| 文件大?。?/td> | 277K |
| 代理商： | DT28F800F3T95 |
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FAST BOOT BLOCK DATASHEET
E
16
PRODUCT PREVIEW
Table 5. Status Register Definition
WSMS
ESS
ES
PS
VPPS
PSS
DPS
R
7
6
5
4
3
2
1
0
NOTES:
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
1 = Ready
0 = Busy
Check SR.7 to determine block erase or program
completion. SR.6
–0 are invalid while SR.7 = “0.”
SR.6 = ERASE SUSPEND STATUS (ESS)
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
When an Erase Suspend command is issued, the
WSM halts execution and sets both SR.7 and SR.6
to
“1.” SR.6 remains set until an Erase Resume
command is written to the CUI.
SR.5 = ERASE STATUS (ES)
1 = Error in Block Erasure
0 = Successful Block Erase
If both SR.5 and SR.4 are
“1”s after a block erase or
program attempt, an improper command sequence
was entered.
SR.4 = PROGRAM STATUS (PS)
1 = Error in Program
0 = Successful Program
SR.3 = V
PP
STATUS (VPPS)
1 = V
PP
Low Detect, Operation Abort
0 = V
PP
OK
SR.3 does not provide a continuous V
PP
feedback.
The WSM interrogates and indicates the V
PP
level
only after a block erase or program operation. SR.3
is not guaranteed to reports accurate feedback
when V
PP
≠
V
PPH1/2
or V
PPLK
.
SR.2 = PROGRAM SUSPEND STATUS (PSS)
1 = Program Suspended
0 = Program in Progress/Completed
When an Program Suspend command is issued, the
WSM halts execution and sets both SR.7 and SR.2
to “1.” SR.2 remains set until an Program Resume
command is written to the CUI.
SR.1 = DEVICE PROTECT STATUS (DPS)
1 = Block Erase or Program Attempted on a
Locked Block, Operation Abort
0 = Unlocked
If a block erase or program operation is attempted to
a locked block, SR.1 is set by the WSM and aborts
the operation if WP# = V
IL
.
SR.0 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
SR.0 is reserved for future use and should be
masked out when polling the status register.
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