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SAM4CP [DATASHEET]
43051E–ATPL–08/14
17.5.9 Tamper Timestamping
As soon as a tamper is detected, the tamper counter is incremented and the RTC stores the time of the day, the date and
the source of the tamper event in registers located in the backup area. Up to two tamper events can be stored.
The tamper counter saturates at 15. Once this limit is reached, the exact number of tamper occurrence since the last
read of stamping registers cannot be known.
The first set of timestamping registers (RTC_TSTR0, RTC_TSDR0, RTC_TSSR0) cannot be overwritten, so once they
have been written all data are stored until the registers are reset.Therefore these registers are storing the first tamper
occurrence after a read.
The second set of timestamping registers (RTC_TSTR1, RTC_TSDR1, RTC_TSSR1) are overwritten each time a
tamper event is detected. This implies that the date and the time data of the first and the second stamping registers may
be equal. This occurs when the tamper counter value carried on field TEVCNT in RTC_TSTR0 equals to 1. Thus this
second set of registers allows to store the last occurrence of tamper before a read.
Reading a set of timestamping register requires three accesses, one for the time of the day, one for the date and one for
the tamper source.
Reading the third part (RTC_TSSR0/1) of a timestamping registers set clears the whole content of the registers (time,
date and tamper source) and makes it available to store a new event.
17.6
Real-time Clock (RTC) User Interface
Note:
If an offset is not listed in the table it must be considered as reserved.
Table 17-1.
Register Mapping
Offset
Register
Name
Access
Reset
0x00
Control Register
RTC_CR
Read/Write
0x0
0x04
Mode Register
RTC_MR
Read/Write
0x0
0x08
Time Register
RTC_TIMR
Read/Write
0x0
0x0C
Calendar Register
RTC_CALR
Read/Write
0x01E111220
0x10
Time Alarm Register
RTC_TIMALR
Read/Write
0x0
0x14
Calendar Alarm Register
RTC_CALALR
Read/Write
0x01010000
0x18
Status Register
RTC_SR
Read-only
0x0
0x1C
Status Clear Command Register
RTC_SCCR
Write-only
–
0x20
Interrupt Enable Register
RTC_IER
Write-only
–
0x24
Interrupt Disable Register
RTC_IDR
Write-only
–
0x28
Interrupt Mask Register
RTC_IMR
Read-only
0x0
0x2C
Valid Entry Register
RTC_VER
Read-only
0x0
0xB0
TimeStamp Time Register 0
RTC_TSTR0
Read-only
0x0
0xB4
TimeStamp Date Register 0
RTC_TSDR0
Read-only
0x0
0xB8
TimeStamp Source Register 0
RTC_TSSR0
Read-only
0x0
0xBC
TimeStamp Time Register 1
RTC_TSTR1
Read-only
0x0
0xC0
TimeStamp Date Register 1
RTC_TSDR1
Read-only
0x0
0xC4
TimeStamp Source Register 1
RTC_TSSR1
Read-only
0x0
0xC8 – 0xE0
Reserved Register
–
–
–
0xE4
Write Protection Mode Register
RTC_WPMR
Read/Write
0x00000000
0xE8 – 0xF8
Reserved Register
–
–
–
0xFC
Reserved Register
–
–
–