426
SAM4CP [DATASHEET]
43051E–ATPL–08/14
0xFD77
Minimum CINR Registers
TXRXBUF_CINRMIN_RX0
Read-only
0x00
0xFD78
TXRXBUF_CINRMIN_RX1
Read-only
0x00
0xFD79
TXRXBUF_CINRMIN_RX2
Read-only
0x00
0xFD7A
TXRXBUF_CINRMIN_RX3
Read-only
0x00
0xFD7B
Average CINR Registers
TXRXBUF_CINRAVG_RX0
Read-only
0x00
0xFD7C
TXRXBUF_CINRAVG_RX1
Read-only
0x00
0xFD7D
TXRXBUF_CINRAVG_RX2
Read-only
0x00
0xFD7E
TXRXBUF_CINRAVG_RX3
Read-only
0x00
0xFD7F
Maximum CINR Registers
TXRXBUF_CINRMAX_RX0
Read-only
0x00
0xFD80
TXRXBUF_CINRMAX_RX1
Read-only
0x00
0xFD81
TXRXBUF_CINRMAX_RX2
Read-only
0x00
0xFD82
TXRXBUF_CINRMAX_RX3
Read-only
0x00
0xFD83 - 0xFD86
RX Time Registers
TXRXBUF_RECTIME_RX0
Read-only
0x00..00
0xFD87 - 0xFD8A
TXRXBUF_RECTIME_RX1
Read-only
0x00..00
0xFD8B - 0xFD8E
TXRXBUF_RECTIME_RX2
Read-only
0x00..00
0xFD8F - 0xFD92
TXRXBUF_RECTIME_RX3
Read-only
0x00..00
0xFD93 - 0xFD96
Zero-Cross Time Registers
TXRXBUF_ZCT_RX0
Read-only
0x00..00
0xFD97 - 0xFD9A
TXRXBUF_ZCT_RX1
Read-only
0x00..00
0xFD9B - 0xFD9E
TXRXBUF_ZCT_RX2
Read-only
0x00..00
0xFD9F - 0xFDA2
TXRXBUF_ZCT_RX3
Read-only
0x00..00
0xFDA3 - 0xFDA4
Header EVM Registers
TXRXBUF_EVM_HD_RX0
Read-only
0x0000
0xFDA5 - 0xFDA6
TXRXBUF_EVM_HD_RX1
Read-only
0x0000
0xFDA7 - 0xFDA8
TXRXBUF_EVM_HD_RX2
Read-only
0x0000
0xFDA9 - 0xFDAA
TXRXBUF_EVM_HD_RX3
Read-only
0x0000
0xFDAB - 0xFDAC
Payload EVM Registers
TXRXBUF_EVM_PYLD_RX0
Read-only
0x0000
0xFDAD - 0xFDAE
TXRXBUF_EVM_PYLD_RX1
Read-only
0x0000
0xFDAF - 0xFDB0
TXRXBUF_EVM_PYLD_RX2
Read-only
0x0000
0xFDB1 - 0xFDB2
TXRXBUF_EVM_PYLD_RX3
Read-only
0x0000
0xFDB3 - 0xFDB6
Accumulated Header EVM
Registers
TXRXBUF_EVM_HDACUM_RX0
Read-only
0x00..00
0xFDB7 - 0xFDBA
TXRXBUF_EVM_HDACUM_RX1
Read-only
0x00..00
0xFDBB - 0xFDBE
TXRXBUF_EVM_HDACUM_RX2
Read-only
0x00..00
0xFDBF - 0xFDC2
TXRXBUF_EVM_HDACUM_RX3
Read-only
0x00..00
0xFDC3 - 0xFDC6
Accumulated Payload EVM
Registers
TXRXBUF_EVM_PYLACUM_RX0
Read-only
0x00..00
0xFDC7 - 0xFDCA
TXRXBUF_EVM_PYLACUM_RX1
Read-only
0x00..00
0xFDCB - 0xFDCE
TXRXBUF_EVM_PYLACUM_RX2
Read-only
0x00..00
0xFDCF - 0xFDD2
TXRXBUF_EVM_PYLACUM_RX3
Read-only
0x00..00
0xFDD3
Buffer Selection Register
TXRXBUF_SELECT_BUFF_RX
Read/write
0x00
0xFDD4
RX Interrupts Register
TXRXBUF_RX_INT
Read/write
0x00
0xFDD5
RX Configuration Register
TXRXBUF_RXCONF
Read/write
0x02
Table 27-3.
Register Mapping (Continued)
Address
Register
Name
Access
Reset