21
SAM4CP [DATASHEET]
43051E–ATPL–08/14
5.5
Low-power Modes
The various low-power modes (backup, wait and sleep modes) of the SAM4CP are described below. Note that the
Segmented LCD Controller can be used in all low-power modes.
Note:
The Wait For Event instruction (WFE) of the Cortex-M4 core can be used to enter any of the low-power modes,
however this may add complexity in the design of application state machines. This is due to the fact that the
WFE instruction goes along with an event flag of the Cortex core (cannot be managed by the software applica-
tion). The event flag can be set by interrupts, a debug event or an event signal from another processor. Since it
is possible for an interrupt to occur just before the execution of WFE, WFE takes into account events that hap-
pened in the past. As a result, WFE prevents the device from entering low-power mode if an interrupt event has
occurred. Atmel has made provision to avoid using the WFE instruction. The work arounds to ease application
design are given in the following description of the low-power modes sequence. Using the WFE instruction is
given as well.
5.5.1
Backup Mode
The purpose of backup mode is to achieve the lowest possible power consumption in a system that executes periodic
wake-ups to perform tasks but which does not require fast start-up time.
The Supply Controller, power-on reset, RTT, RTC, backup registers and the 32 kHz oscillator (RC or crystal oscillator
selected by software in the Supply Controller) are running. The regulator and the core supplies are off. The power-on-
reset on VDDBU can be deactivated by software.
The SAM4CP can be awakened from backup mode through the Force Wake-up (FWUP) pin, WKUP0, WKUP1 to
WKUP15 pins, the VDDIO Supply Monitor (SM) if VDDIO is supplied, or through an RTT or RTC wake-up event. Wake-
up pins multiplexed with anti-tampering functions are possible sources of wake up as well in case if an anti-tampering
event is detected. The TMP0 pad is supplied by the backup power supply (VDDBU). Other anti-tamper input pads are
supplied by VDDIO.
The LCD Controller can be used in this mode. The purpose is to maintain the displayed message on the LCD display
after entering the backup mode. The current consumption on VDDIN to maintain the LCD is 10
μ
A typical.
In case if the VDDIO power supply is kept on with VDDBU when entering backup mode, it is up to the application to
configure all PIO lines in a stable and known state to avoid extra power consumption or possible current path with the
input/output lines of the external on-board devices.
5.5.1.1 Entering and Exiting Backup Mode
To enter backup mode, follow the steps in the sequence below:
1.
Depending on the application, set the PIO lines in the correct mode and configuration (input pull-up or pull-down,
output low or high levels).
2.
Disable the Main Crystal Oscillator (enabled by SAM-BA boot if device is booting from ROM).
3.
Configure PA30/PA31 (XIN/XOUT) into PIO mode according to their use.
4.
Disable JTAG lines via the SFR1 register in Matrix 0 (by default, internal pull-up or pull-down is disabled on JTAG
lines).
5.
Enable RTT in 1 Hz mode.
6.
Disable Normal Mode of RTT (RTT will run in 1 Hz mode).
7.
Disable POR backup if not needed (provides power-saving).
8.
Disable Core brownout detector.
9.
Select one of the following methods to complete the sequence:
a.
To enter backup mode using the VROFF bit:
Write a 1 to the VROFF bit of SUPC_CR.
b.
To enter backup mode using the WFE instruction:
Write a 1 to the SLEEPDEEP bit of the Cortex-M4 processor.
Execute the WFE instruction of the processor.