參數(shù)資料
型號(hào): EDB9301
廠商: Cirrus Logic Inc
文件頁(yè)數(shù): 3/5頁(yè)
文件大?。?/td> 0K
描述: KIT DEVELOPMENT EP9301 ARM9
標(biāo)準(zhǔn)包裝: 1
其它名稱(chēng): 598-1131
ER636E2
B
3
2) Temporarily disable the UART DMA RX interface by clearing the RXDMAE bit in the UART1DMACtrl reg-
ister.
3) Wait until the difference between the CURRENTx and BASEx registers in the DMA channel is equal to
N + 1.
At this point, the rest of the packet is guaranteed to have been written to memory. Using this method will
cause an extra byte to be read from the UART by the DMA channel and also written to memory. This last
byte should be ignored.
SDRAM Controller
Description 1
Using the SDRAM controller in auto-precharge mode will produce system instability at external bus speeds
greater than 50 MHz.
Workaround
Do not turn on the auto-precharge feature of the SDRAM controller if the external bus speed will be greater
than 50 MHz.
Description 2
When the SDRAM controller is configured for PRECHARGE ALL command, the actual sequence is not
always issued to the SDRAM device(s).
Workaround
Do a read from each SDRAM bank so that a PRECHARGE command is issued to each bank of the SDRAM
device. This will satisfy the required SDRAM initialization sequence.
Due to the effectiveness and simplicity of the software workaround, no silicon fix is planned.
RTC
Description
The internal RTC oscillator is susceptible to noise which can lead to extra clocks on the internal 32.768-kHz
signal.
Workaround
Please refer to application note AN265, “EP93xx RTC Oscillator Circuit”, which can be found at
No fix of this bug is planned for future silicon revisions.
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