參數資料
型號: EDD5116AFTA-7A-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 512M bits DDR SDRAM
中文描述: 32M X 16 DDR DRAM, 0.75 ns, PDSO66
封裝: ROHS COMPLIANT, PLASTIC, TSOP2-66
文件頁數: 9/49頁
文件大?。?/td> 567K
代理商: EDD5116AFTA-7A-E
EDD5108AFTA, EDD5116AFTA
Data Sheet E0699E20 (Ver. 2.0)
9
Timing Parameter Measured in Clock Cycle
Number of clock cycle
tCK
6ns
7.5ns
Parameter
Symbol
min.
max.
min.
max.
Unit
Write to pre-charge command delay (same bank)
tWPD
4 + BL/2
3 + BL/2
tCK
Read to pre-charge command delay (same bank)
tRPD
BL/2
BL/2
tCK
Write to read command delay (to input all data)
tWRD
2 + BL/2
2 + BL/2
tCK
Burst stop command to write command delay
(CL = 2)
tBSTW
2
tCK
(CL = 2.5)
tBSTW
3
3
tCK
Burst stop command to DQ High-Z
(CL = 2)
tBSTZ
2
2
tCK
(CL = 2.5)
tBSTZ
2.5
2.5
2.5
2.5
tCK
Read command to write command delay
(to output all data)
(CL = 2)
tRWD
2 + BL/2
tCK
(CL = 2.5)
tRWD
3 + BL/2
3 + BL/2
tCK
Pre-charge command to High-Z
(CL = 2)
tHZP
2
2
tCK
(CL = 2.5)
tHZP
2.5
2.5
2.5
2.5
tCK
Write command to data in latency
tWCD
1
1
1
1
tCK
Write recovery time
tWR
3
2
tCK
DM to data in latency
tDMD
0
0
0
0
tCK
Mode register set command cycle time
tMRD
2
2
tCK
Self refresh exit to non-read command
tSNR
12
10
tCK
Self refresh exit to read command
tSRD
200
200
tCK
Power down entry
tPDEN
1
1
1
1
tCK
Power down exit to command input
tPDEX
1
1
tCK
相關PDF資料
PDF描述
EDD5116AFTA-7B-E 512M bits DDR SDRAM
EDD5116AFTA 512M bits DDR SDRAM
EDD51321CBH 512M bits DDR SDRAM
EDD51321CBH-6CTT-E 512M bits DDR SDRAM
EDD51321CBH-7ETT-E 512M bits DDR SDRAM
相關代理商/技術參數
參數描述
EDD5116AFTA-7B-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM
EDD5116AFTA-H 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM High Quality Product
EDD5116AFTA-TI 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM WTR (Wide Temperature Range)
EDD5116AGTA 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM
EDD5116AGTA-4 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR SDRAM