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參數(shù)資料
| 型號： | EDI2CG472128V-D2 |
| 英文描述： | SSRAM Modules |
| 中文描述： | 的SSRAM模塊 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 172K |
| 代理商： | EDI2CG472128V-D2 |
EDI2CG272128V
1
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
August 2000 Rev.0
ECO#13088
The EDI2CG272128VxxD1 is a Synchronous/Synchronous Burst
SRAM, 72 position DIMM (144 contacts) Module, small outline.
The Module contains four (4) Synchronous Burst Ram Devices,
packaged in the industry standard JEDEC 14mmx20mm TQFP
placed on a Multilayer FR4 Substrate. The module architecture is
defined as a Sync/Sync Burst, Flow-Through, with support for
either linear or sequential burst. This module provides High
Performance, 2-1-1-1 accesses when used in Burst Mode, and
used as a Synchronous Only Mode, provides a high performance
cost advantage over BiCMOS aysnchronous device architectures.
Synchronous Only operations are performed via strapping ADSC
Low, and ADSP / ADV High, which provides for Ultra Fast Accesses
in Read Mode while providing for internally self-timed Early
Writes.
Synchronous/Synchronous Burst operations are in relation to an
externally supplied clock, Registered Address, Registered Global
Write, Registered Enables as well as an Asynchronous Output
enable. This Module has been defined for Quad Word access in
both read and write operations.
FEATURES
s 2x128Kx72 Synchronous, Synchronous Burst
s Flow-Through Architecture
s Linear and Sequential Burst Support via MODE pin
s Access Speed(s): TKHQV = 8.5, 9, 12, 15ns
s Clock Controlled Registered Bank Enables (E1, E2)
s Clock Controlled Registered Address
s Clock Controlled Registered Global Write (GW)
s Aysnchronous Output Enable (G)
s Individual Bank Sleep Mode Enables (ZZ1, ZZ2)
s Gold Lead Finish
s 3.3V
±10% Operation
s Common Data I/O
s High Capacitance (30pF) Drive, at Rated Access Speed
s Single Total Array Clock
s Multiple Vcc and Gnd
2x128Kx72, 3.3V Sync/Sync Burst Flow-Through
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EDI2CG472256V-D2 | SSRAM Modules |
| EDI2CG272128V12D1 | 2x128Kx72, 3.3V S nc/S nc Burst Flow-Through(2x128Kx72, 3.3V，12ns,同步/同步脈沖靜態(tài)RAM模塊(流通結(jié)構(gòu)）) |
| EDI2CG272128V15D1 | 2x128Kx72, 3.3V S nc/S nc Burst Flow-Through(2x128Kx72, 3.3V，15ns,同步/同步脈沖靜態(tài)RAM模塊(流通結(jié)構(gòu)）) |
| EDI2CG272128V85D1 | 2x128Kx72, 3.3V Sync/Sync Burst Flow-Through(2x128Kx72, 3.3V，8.5ns,同步/同步脈沖靜態(tài)RAM模塊(流通結(jié)構(gòu)）) |
| EDI2CG272128V9D1 | 2x128Kx72, 3.3V S nc/S nc Burst Flow-Through(2x128Kx72, 3.3V，9ns,同步/同步脈沖靜態(tài)RAM模塊(流通結(jié)構(gòu)）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDI2CG472256V | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8 Megabyte Sync/Sync Burst, Dual Key DIMM |
| EDI2CG472256V10D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8 Megabyte Sync/Sync Burst, Dual Key DIMM |
| EDI2CG472256V12D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8 Megabyte Sync/Sync Burst, Dual Key DIMM |
| EDI2CG472256V15D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8 Megabyte Sync/Sync Burst, Dual Key DIMM |
| EDI2CG472256V9D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:8 Megabyte Sync/Sync Burst, Dual Key DIMM |
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