參數(shù)資料
型號(hào): EDI2CG472256V12D2
英文描述: 4x256Kx72, 3.3V Synchronous/Synchronous Burst Flow-Through(4x256Kx72, 3.3V,12ns,同步/同步脈沖靜態(tài)RAM模塊(流通結(jié)構(gòu)))
中文描述: 4x256Kx72,3.3同步/同步突發(fā)流量通過(4x256Kx72,3.3伏,12ns,同步/同步脈沖靜態(tài)內(nèi)存模塊(流通結(jié)構(gòu)))
文件頁數(shù): 10/12頁
文件大?。?/td> 366K
代理商: EDI2CG472256V12D2
7
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
EDI2CG472256V
READ CYCLE TIMING PARAMETERS
*TBD
9ns
10ns
12ns
15ns
Description
Sym
Min
Max
Min
Max
Min
Max
Min
Max
Units
Clock Cycle Time
tKHKH
15
20
ns
Clock High Time
tKHKL
5556
ns
Clock Low Time
tKLKH
5556
ns
Clock to Output Valid
tKHQV
9
101215
ns
Clock to Output Invalid
tKHQX1
3333
ns
Clock to Output Low-Z
tKHQX
4444
ns
Output Enable to Output Valid
tGLQV
5556
ns
Output Enable to Output Low-Z
tGLQX
0000
ns
Output Enable to Output High-Z
tGHQZ
5555
ns
Address Setup
tAVKH
2.5
ns
Bank Enable Setup
tEVKH
2.5
ns
Address Hold
tKHAX
1.0
ns
Bank Enable Hold
tKHEX
1.0
ns
First
Second
Third
Fourth
Address
(external)
(internal)
A..A00
A..A01
A..A10
A..A11
A..A01
A..A00
A..A11
A..A10
A..A11
A..A00
A..A01
A..A11
A..A10
A..A01
A..A00
BURST ADDRESS TABLE (MODE = VSS)
BURST ADDRESS TABLE (MODE = NC/VCC)
First
Second
Third
Fourth
Address
(external)
(internal)
A..A00
A..A01
A..A10
A..A11
A..A01
A..A10
A..A11
A..A00
A..A10
A..A11
A..A00
A..A01
A..A11
A..A00
A..A01
A..A10
SYNCHRONOUS ONLY READ CYCLE
tKHQX
DQ
Read Cycle
Q(Addr 1)
Q(Addr 2)
tKHQZ
GW\
OE\
ADDR
CE\
CLK
tKHQV
Addr 1
Addr 2
Addr 1
tKHKH
tKLKH
tKHKL
tGLQX
Back to Back Read
tKHQX1
tGLQV
tKHAX
tAVKH
Ex\
G\
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