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參數(shù)資料
| 型號： | EDI2GG41864V15D |
| 英文描述： | 4x64Kx18 3.3V Synchronous SRAM Card Module(4x64Kx18, 3.3V，15ns,同步靜態(tài)RAM卡模塊(流通結(jié)構(gòu)）) |
| 中文描述： | 4x64Kx18 3.3同步SRAM卡模塊（4x64Kx18，3.3伏，15納秒，同步靜態(tài)內(nèi)存卡模塊（流通結(jié)構(gòu)）） |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 1529K |
| 代理商： | EDI2GG41864V15D |
1
EDI2GG41864V
White Electronic Designs Corporation Westborough, MA 01581
(508) 366-5151 www.whiteedc.com
July1999 Rev ECO
576 Kilobyte Synchronous Card Edge DIMM
FEATURES
PIN NAMES
The EDI2KG41864VxxD2 is a Synchronous SRAM 60 position
Card Edge DIMM(120 contacts) Module, organized as 4x64Kx18.
The Module contains four (4) Synchronous Burst RamDevices,
packaged in the industry standard JEDEC 14mmx20mmTQFP
placed on a Multilayer FR4 Substrate. The module architecture is
defined as a Synchronous Only, Flow-Through, Early Write device.
This module provides high performance, ultra fast access times at a
cost per bit benefit over BiCMOS Asynchronous SRAMbased
devices. As well as improved cost per bit, the use of Synchronous
or Synchronous Burst devices or modules can ease the memory
subsystemdesign by reducing or easing the memory controller
requirement.
Synchronous operations are in relation to an externally supplied clock,
registered address, registered global write, registered enables as well
as an Asynchronous Output enable. All read and Write operations to
this module are performed on Long Words (Double Words) 32 bit
operation.
Write cycles are internally self timed and are initiated by a rising clock
edge. This feature relieves the designer the task of developing external
write pulse width circuitry.
4x64Kx18 Synchronous
Flow-Through Architecture
Clock Controlled Registered Bank Enables (E1\,
E2\, E3, E4\)
Clock Controlled Registered Address
Clock Controlled Registered Global Write (GW\)
Aysnchronous Output Enable (G\)
Internally self-timed Write
Gold Lead Finish
3.3V+ 10%, -5% Operation
Access Speed(s): TKHQV=9.5, 10, 11, 12, 15ns
Common Data I/O
High Capacitance (30pf) drive, at rated Access
Speed
Single total array Clock
Multiple Vcc and Gnd
DQ0-DQ17
A0-A15
E1\, E2\, E3\, E4\
Clk
GW\
G\
Vcc
Vss
Input/Output Bus
Address Bus
Synchronous Bank Enables
Array Clock
Synchronous Global write Enable
Asynchronous Output Enable
3.3V Power Supply
Gnd
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| EDI2GG464128V | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:4MB SYNCHRONOUS CARD EDGE DIMM |
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