
Preliminary
...the world's most energy friendly microcontrollers
2011-05-19 - d0034_Rev0.91
348
www.energymicro.com
Bit
Name
Reset
Access
Description
Value
Mode
Description
0
DISABLE
CH13 output is disabled in idle phase
1
HIGH
CH13 output is high in idle phase
2
LOW
CH13 output is low in idle phase
3
DACCH1
CH13 output is connected to DAC CH1 output in idle phase
25:24
CH12
0x0
RW
Channel 12 idlephase configuration
Value
Mode
Description
0
DISABLE
CH12 output is disabled in idle phase
1
HIGH
CH12 output is high in idle phase
2
LOW
CH12 output is low in idle phase
3
DACCH1
CH12 output is connected to DAC CH1 output in idle phase
23:22
CH11
0x0
RW
Channel 11 idlephase configuration
Value
Mode
Description
0
DISABLE
CH11 output is disabled in idle phase
1
HIGH
CH11 output is high in idle phase
2
LOW
CH11 output is low in idle phase
21:20
CH10
0x0
RW
Channel 10 idlephase configuration
Value
Mode
Description
0
DISABLE
CH10 output is disabled in idle phase
1
HIGH
CH10 output is high in idle phase
2
LOW
CH10 output is low in idle phase
19:18
CH9
0x0
RW
Channel 9 idlephase configuration
Value
Mode
Description
0
DISABLE
CH9 output is disabled in idle phase
1
HIGH
CH9 output is high in idle phase
2
LOW
CH9 output is low in idle phase
17:16
CH8
0x0
RW
Channel 8 idlephase configuration
Value
Mode
Description
0
DISABLE
CH8 output is disabled in idle phase
1
HIGH
CH8 output is high in idle phase
2
LOW
CH8 output is low in idle phase
15:14
CH7
0x0
RW
Channel 7 idlephase configuration
Value
Mode
Description
0
DISABLE
CH7 output is disabled in idle phase
1
HIGH
CH7 output is high in idle phase
2
LOW
CH7 output is low in idle phase
13:12
CH6
0x0
RW
Channel 6 idlephase configuration
Value
Mode
Description
0
DISABLE
CH6 output is disabled in idle phase
1
HIGH
CH6 output is high in idle phase
2
LOW
CH6 output is low in idle phase