參數(shù)資料
型號: EFM32TG222F32
廠商: Energy Micro
文件頁數(shù): 47/136頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 32KB FLASH 48LQFP
特色產(chǎn)品: EFM32 Tiny Gecko
標(biāo)準(zhǔn)包裝: 1
系列: Tiny Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 37
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x12b,D/A 1x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1029-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
18
www.energymicro.com
Self-modifying code. If a program contains self-modifying code, use an ISB instruction immediately
after the code modification in the program. This ensures subsequent instruction execution uses the
updated program.
Memory map switching. If the system contains a memory map switching mechanism, use a DSB
instruction after switching the memory map in the program. This ensures subsequent instruction
execution uses the updated memory map.
Dynamic exception priority change. When an exception priority has to change when the exception is
pending or active, use DSB instructions after the change. This ensures the change takes effect on
completion of the DSB instruction.
Using a semaphore in multi-master system. If the system contains more than one bus master, for
example, if another processor is present in the system, each processor must use a DMB instruction
after any semaphore instructions, to ensure other bus masters see the memory transactions in the
order in which they were executed.
Memory accesses to Strongly-ordered memory, such as the system control block, do not require the
use of DMB instructions.
2.2.5 Bit-banding
A bit-band region maps each word in a bit-band alias region to a single bit in the bit-band region. The
bit-band regions occupy the lowest 1MB of the SRAM and peripheral memory regions.
The memory map has two 32MB alias regions that map to two 1MB bit-band regions:
accesses to the 32MB SRAM alias region map to the 1MB SRAM bit-band region, as shown in
accesses to the 32MB peripheral alias region map to the 1MB peripheral bit-band region, as shown
Table 2.12. SRAM memory bit-banding regions
Address
range
Memory region
Instruction and data accesses
0x20000000
-
0x200FFFFF
SRAM bit-band region
Direct accesses to this memory range behave as SRAM memory accesses, but
this region is also bit addressable through bit-band alias.
0x22000000
-
0x23FFFFFF
SRAM bit-band alias
Data accesses to this region are remapped to bit band region. A write operation
is performed as read-modify-write. Instruction accesses are not remapped.
Table 2.13. Peripheral memory bit-banding regions
Address
range
Memory region
Instruction and data accesses
0x40000000-
0x400FFFFF
Peripheral bit-band region
Direct accesses to this memory range behave as peripheral memory
accesses, but this region is also bit addressable through bit-band alias.
0x42000000-
0x43FFFFFF
Peripheral bit-band alias
Data accesses to this region are remapped to bit band region. A write
operation is performed as read-modify-write. Instruction accesses are not
permitted.
Note
A word access to the SRAM or peripheral bit-band alias regions map to a single bit in the
SRAM or peripheral bit-band region.
The following formula shows how the alias region maps onto the bit-band region:
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