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參數(shù)資料
| 型號： | ELANSC300-25KC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| 中文描述： | 32-BIT, 25 MHz, MICROCONTROLLER, PQFP208 |
| 封裝： | SHRINK, PLASTIC, QFP-208 |
| 文件頁數(shù)： | 120/139頁 |
| 文件大?。?/td> | 1388K |
| 代理商： | ELANSC300-25KC |
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120
élanSC300 Microcontroller Data Sheet
P R E L I M I N A R Y
Notes:
1. This is the timing when ROMCS is qualified with MEMR or MEMW, (Bit 2 of the Miscellaneous 5 Register, Index B3h, = 0.)
2. This is the timing when ROMCS is configured as an address decode, (Bit 2 of the Miscellaneous 5 Register, Index B3h, = 1.)
These timings are based on default wait state settings, set for three wait states in bits 4 and 7 of the Command Delay Register,
Index 60h, and required initial programming. These timings may be modified via the MMS Memory Wait State 1 Register, Index
62h, and the Command Delay Register, Index 60h. (See the
élan
TM
SC300 Microcontroller Programmer’s Reference Manual
,
order #18470.) For fast ROMCS (BIOS ROM) accesses, set bit 6 of Miscellaneous 5 Register, Index B3h. Bits 4 and 5 control
wait states when fast ROMCS
is enabled. For more information, see Table 66, “DOS ROM and Fast DOS ROM Read/Write 16-
Bit Cycles (See Figure 49),” on page 124. Also see the élan
TM
SC300 and élan
TM
SC310 Devices’ ISA Bus Anomalies Application
Note
, order #20747.
Table 64.
BIOS ROM Read/Write 8-Bit Cycle (See Figure 47)
Symbol
Parameter Description
Notes
Preliminary
Units
Min
Max
t1a
t1b
t2a
t2b
t3a
t3b
t4a
t4b
t5a
t5b
t6
t7
t8
t9
t10
t11a
t11b
t12
t13
t14
t15
SA stable to ROMCS active
SA stable to ROMCS active
SA hold from ROMCS inactive (write)
SA hold from ROMCS inactive (read)
ROMCS pulse width (read)
ROMCS pulse width (write)
MEMW active to ROMCS active
MEMR active to ROMCS active
ROMCS hold from MEMW inactive
ROMCS hold from MEMR inactive
RDDATA setup to command inactive
RDDATA hold from command inactive
WRDATA setup to command inactive
WRDATA hold from command inactive
DBUFOE active from command
DBUFOE hold from MEMW
DBUFOE hold from MEMR
ENDIRH, ENDIRL setup before MEMR
ENDIRH, ENDIRL hold from MEMR
ROMCS active to command active
ROMCS hold from SA
1
2
1
1
1
1
1
1
1
1
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
50
0
390
335
2
1
0
0
40
0
200
50
5
50
–2
50
–4
65
5
2
2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ELANSC300-25KI | 制造商:Advanced Micro Devices 功能描述:32bit MCU, CISC, ROMLESS, Elan Family 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ELANSC300-25VC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300-25VI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300-33KC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller |
| ELANSC300-33KI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Highly Integrated, Low-Power, 32-Bit Microcontroller |
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