參數(shù)資料
型號: ELANSC300-33VI
廠商: Advanced Micro Devices, Inc.
元件分類: 32位微控制器
英文描述: Highly Integrated, Low-Power, 32-Bit Microcontroller
中文描述: 高度集成,低功耗,32位微控制器
文件頁數(shù): 11/139頁
文件大小: 1388K
代理商: ELANSC300-33VI
P R E L I M I N A R Y
élanSC300 Microcontroller Data Sheet
11
LIST OF TABLES
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10. Miscellaneous Interface............................................................................................. 33
Table 11. Power Pins................................................................................................................ 33
Table 12.
Non-Multiplexed Address Signals Provided by MA11–MA0...................................... 34
Table 13. DRAM Mode Selection.............................................................................................. 46
Table 14. MA and SA Signal Pin Sharing.................................................................................. 46
Table 15. Supported DRAM/SRAM Configuration .................................................................... 47
Table 16. DRAM Address Translation (Page Mode)................................................................. 48
Table 17. DRAM Address Translation (Enhanced Page Mode)................................................ 49
Table 18. SRAM Access Pins ................................................................................................... 49
Table 19. SRAM Wait State Select Logic.................................................................................. 50
Table 20. High-Speed CPU Clock Frequencies........................................................................ 53
Table 21. PLL Output................................................................................................................ 53
Table 22. PMU Modes............................................................................................................... 54
Table 23. Internal Clock States................................................................................................. 54
Table 24. Internal I/O Pulldown States...................................................................................... 59
Table 25. Parallel Port EPP Mode Pin Definition ...................................................................... 61
Table 26. External Resistor Requirements................................................................................ 65
Table 27. Bus Option Select Bit Logic....................................................................................... 68
Table 28. Pins Shared Between CPU Local Bus and Internal LCD Interface Functions........... 69
Table 29. Pins Shared Between Maximum ISA Bus and Internal LCD Interface Functions ..... 70
Table 30. SRAM Interface......................................................................................................... 71
Table 31. Dual-Scan LCD Data Bus.......................................................................................... 71
Table 32. Bidirectional Parallel Port Pin Description................................................................. 71
Table 33. X1OUT Clock Source Pin Description....................................................................... 72
Table 34. XT Keyboard Pin Description.................................................................................... 72
Table 35. PCMCIA Data Path Control....................................................................................... 72
Table 36. 14-MHz Clock Source ............................................................................................... 72
Table 37. Internal LCD Controller Bus Mode ISA Bus Functionality......................................... 73
Table 38. Local Bus Mode Additional ISA Bus Functionality..................................................... 73
Table 39. Maximum ISA Bus Mode Additional ISA Bus Functionality....................................... 73
Table 40. Boundary Scan (JTAG) Cells—Order and Type ....................................................... 75
Table 41. élanSC300 Microcontroller JTAG Instruction Opcodes ............................................ 79
Table 42. DC Characteristics over Commercial and Industrial Operating Ranges
(Plastic Shrink Quad Flat Pack (QFP), 33 MHz, 3.3 V)............................................. 80
Table 43. DC Characteristics over Commercial and Industrial Operating Ranges
(Plastic Shrink Quad Flat Pack (QFP), 33 MHz, 5 V)................................................ 81
Table 44. Commercial and Industrial Operating Voltage Ranges at 25°................................... 81
Table 45. Thermal Resistance (°C/Watt)
ψ
JT
and
θ
JA
for 208-pin QFP and TQFP packages .. 82
Table 46. Typical Maximum ISA Mode Power Consumption.................................................... 82
Table 47. Typical Internal LCD Mode Power Consumption ...................................................... 83
Table 48. I/O Drive Type Description (Worst Case).................................................................. 84
Table 49. Recommended Oscillator Component Value Limits.................................................. 96
Table 50. Loop-Filter Component Values.................................................................................. 97
I/O Pin Voltage Level................................................................................................. 24
Memory Bus Interface............................................................................................... 25
System Interface ....................................................................................................... 26
Keyboard Interface.................................................................................................... 28
Parallel Port Interface................................................................................................ 28
Serial Port Interface................................................................................................... 29
Power Management Interface................................................................................... 29
PCMCIA Interface ..................................................................................................... 30
Display Interface........................................................................................................ 31
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