參數(shù)資料
型號: EP20K200EQC240-3N
廠商: Altera
文件頁數(shù): 56/117頁
文件大?。?/td> 0K
描述: IC APEX 20KE FPGA 200K 240-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 24
系列: APEX-20K®
LAB/CLB數(shù): 832
邏輯元件/單元數(shù): 8320
RAM 位總計: 106496
輸入/輸出數(shù): 168
門數(shù): 404000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 240-BFQFP
供應(yīng)商設(shè)備封裝: 240-PQFP(32x32)
Altera Corporation
43
APEX 20K Programmable Logic Device Family Data Sheet
Figure 28 shows how a column IOE connects to the interconnect.
Figure 28. Column IOE Connection to the Interconnect
Dedicated Fast I/O Pins
APEX 20KE devices incorporate an enhancement to support bidirectional
pins with high internal fanout such as PCI control signals. These pins are
called Dedicated Fast I/O pins (FAST1, FAST2, FAST3, and FAST4) and
replace dedicated inputs. These pins can be used for fast clock, clear, or
high fanout logic signal distribution. They also can drive out. The
Dedicated Fast I/O pin data output and tri-state control are driven by
local interconnect from the adjacent MegaLAB for high speed.
Row Interconnect
Column Interconnect
Each IOE can drive column interconnect. In APEX 20KE devices,
IOEs can also drive FastRow interconnect. Each IOE data
and OE signal is driven by local interconnect.
Any LE or ESB can drive
a column pin through a
row, column, and MegaLAB
interconnect.
IOE
LAB
An LE or ESB can drive a
pin through a local
interconnect for faster
clock-to-output times.
MegaLAB Interconnect
相關(guān)PDF資料
PDF描述
EP20K200EQC240-3 IC APEX 20KE FPGA 200K 240-PQFP
A42MX24-2TQG176I IC FPGA MX SGL CHIP 36K 176-TQFP
AT24C1024BY7-YH25-T IC EEPROM 1MBIT 1MHZ 8UDFN
HMC50DRTN-S93 CONN EDGECARD 100PS DIP .100 SLD
HMC50DRTH-S93 CONN EDGECARD 100PS DIP .100 SLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K200EQI208-1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K200EQI208-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K200EQI208-1X 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K200EQI208-2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K200EQI208-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA