參數資料
型號: EP20K200FC484-3V
廠商: Altera
文件頁數: 38/117頁
文件大?。?/td> 0K
描述: IC APEX 20KE FPGA 200K 484-BGA
標準包裝: 60
系列: APEX-20K®
LAB/CLB數: 832
邏輯元件/單元數: 8320
RAM 位總計: 106496
輸入/輸出數: 382
門數: 404000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 484-BGA
供應商設備封裝: 484-FBGA(23x23)
Altera Corporation
27
APEX 20K Programmable Logic Device Family Data Sheet
Figure 14. APEX 20K Macrocell
For registered functions, each macrocell register can be programmed
individually to implement D, T, JK, or SR operation with programmable
clock control. The register can be bypassed for combinatorial operation.
During design entry, the designer specifies the desired register type; the
Quartus II software then selects the most efficient register operation for
each registered function to optimize resource utilization. The Quartus II
software or other synthesis tools can also select the most efficient register
operation automatically when synthesizing HDL designs.
Each programmable register can be clocked by one of two ESB-wide
clocks. The ESB-wide clocks can be generated from device dedicated clock
pins, global signals, or local interconnect. Each clock also has an
associated clock enable, generated from the local interconnect. The clock
and clock enable signals are related for a particular ESB; any macrocell
using a clock also uses the associated clock enable.
If both the rising and falling edges of a clock are used in an ESB, both
ESB-wide clock signals are used.
Clock/
Enable
Select
Product-
Term
Select
Matrix
Parallel Logic
Expanders
(From Other
Macrocells)
ESB-Wide
Clears
ESB-Wide
Clock Enables
ESB-Wide
Clocks
32 Signals
from Local
Interconnect
Clear
Select
ESB
Output
Programmable
Register
222
ENA
D
CLRN
Q
相關PDF資料
PDF描述
EP20K200EFI672-2X IC APEX 20KE FPGA 200K 672-FBGA
EP20K100QC240-3V IC APEX 20K FPGA 100K 240-PQFP
EP20K100QC208-3V IC APEX 20K FPGA 100K 208-PQFP
EP20K100EBI356-2X IC APEX 20KE FPGA 100K 356-BGA
ABB65DHAN CONN EDGECARD 130PS R/A .050 SLD
相關代理商/技術參數
參數描述
EP20K200FI484-1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP20K200FI484-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K200FI484-2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP20K200FI484-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K200FI484-2N 功能描述:FPGA - 現場可編程門陣列 CPLD - APEX 20K 832 Macro 382 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256