Figure 33. Relationship between VCC" />
參數(shù)資料
型號(hào): EP20K300EFC672-2N
廠商: Altera
文件頁數(shù): 81/117頁
文件大?。?/td> 0K
描述: IC APEX 20KE FPGA 300K 672-FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 40
系列: APEX-20K®
LAB/CLB數(shù): 1152
邏輯元件/單元數(shù): 11520
RAM 位總計(jì): 147456
輸入/輸出數(shù): 408
門數(shù): 728000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 672-BBGA
供應(yīng)商設(shè)備封裝: 672-BGA(27x27)
66
Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
Figure 33. Relationship between VCCIO & VCCINT for 3.3-V PCI Compliance
Figure 34 shows the typical output drive characteristics of APEX 20K
devices with 3.3-V and 2.5-V VCCIO. The output driver is compatible with
the 3.3-V PCI Local Bus Specification, Revision 2.2 (when VCCIO pins are
connected to 3.3 V). 5-V tolerant APEX 20K devices in the -1 speed grade
are 5-V PCI compliant over all operating conditions.
Figure 34. Output Drive Characteristics of APEX 20K Device
Note to Figure 34:
(1)
These are transient (AC) currents.
3.0
3.1
3.3
VCCIO
3.6
2.3
2.5
2.7
VCCINT (V)
(V)
PCI-Compliant Region
VO Output Voltage (V)
IOL
IOH
V
VCCINT = 2.5
VCCIO = 2.5
Room Temperature
V
VCCINT = 2.5
VCCIO = 3.3
Room Temperature
12
3
10
20
30
50
60
40
70
80
90
VO Output Voltage (V)
12
3
10
20
30
50
60
40
70
80
90
IOL
O
Typical I
Output
Current (mA)
O
Typical I
Output
Current (mA)
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