參數(shù)資料
型號(hào): EP2AGX125EF35C6N
廠商: Altera
文件頁(yè)數(shù): 51/90頁(yè)
文件大小: 0K
描述: IC ARRIA II GX 125K 1152FBG
產(chǎn)品培訓(xùn)模塊: Arria II GX FPGA
Three Reasons to Use FPGA's in Industrial Designs
特色產(chǎn)品: Arria? II GX FPGAs
標(biāo)準(zhǔn)包裝: 3
系列: Arria II GX
LAB/CLB數(shù): 4964
邏輯元件/單元數(shù): 118143
RAM 位總計(jì): 8315904
輸入/輸出數(shù): 452
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1152-BBGA
供應(yīng)商設(shè)備封裝: 1152-FBGA(27x27)
配用: 544-2600-ND - KIT DEV ARRIA II GX FPGA 2AGX125
其它名稱: 544-2599-5
EP2AGX125EF35C6NES
EP2AGX125EF35C6NES-ND
Chapter 1: Device Datasheet for Arria II Devices
1–47
Switching Characteristics
December 2013
Altera Corporation
Jitter tolerance at 2488.32 Mbps
Jitter frequency = 0.06 KHz
Pattern = PRBS15
> 15
UI
Jitter frequency = 100 KHZ
Pattern = PRBS15
> 1.5
UI
Jitter frequency =
1MHz
Pattern = PRBS15
> 0.15
UI
Jitter frequency = 10 MHz
Pattern = PRBS15
> 0.15
UI
Fibre Channel Transmit Jitter Generation (4), (5)
Total jitter FC-1
Pattern = CRPAT
0.23
0.23
UI
Deterministic jitter FC-1
Pattern = CRPAT
0.11
0.11
UI
Total jitter FC-2
Pattern = CRPAT
0.33
0.33
UI
Deterministic jitter FC-2
Pattern = CRPAT
0.2
0.2
UI
Total jitter FC-4
Pattern = CRPAT
0.52
0.52
UI
Deterministic jitter FC-4
Pattern = CRPAT
0.33
0.33
UI
Fibre Channel Receiver Jitter Tolerance (4), (6)
Deterministic jitter FC-1
Pattern = CJTPAT
> 0.37
UI
Random jitter
FC-1
Pattern = CJTPAT
> 0.31
UI
Sinusoidal jitter FC-1
Fc/25000
> 1.5
UI
Fc/1667
> 0.1
UI
Deterministic jitter FC-2
Pattern = CJTPAT
> 0.33
UI
Random jitter
FC-2
Pattern = CJTPAT
> 0.29
UI
Sinusoidal jitter FC-2
Fc/25000
> 1.5
UI
Fc/1667
> 0.1
UI
Deterministic jitter FC-4
Pattern = CJTPAT
> 0.33
UI
Random jitter FC-4
Pattern = CJTPAT
> 0.29
UI
Sinusoidal jitter FC-4
Fc/25000
> 1.5
UI
Fc/1667
> 0.1
UI
XAUI Transmit Jitter Generation (7)
Total jitter at 3.125 Gbps
Pattern = CJPAT
0.3
0.3
UI
Deterministic jitter at
3.125 Gbps
Pattern = CJPAT
0.17
0.17
UI
XAUI Receiver Jitter Tolerance (7)
Total jitter
> 0.65
UI
Deterministic jitter
> 0.37
UI
Table 1–41. Transceiver Block Jitter Specifications for Arria II GZ Devices (Note 1), (2) (Part 2 of 7)
Symbol/
Description
Conditions
–C3 and –I3
–C4 and –I4
Unit
Min
Typ
Max
Min
Typ
Max
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參數(shù)描述
EP2AGX125EF35C6NES 制造商:Altera Corporation 功能描述:FPGA Arria
EP2AGX125EF35I3 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Arria II GX 4964 LABs 452 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX125EF35I3N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Arria II GX 4964 LABs 452 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX125EF35I5 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Arria II GX 4964 LABs 452 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX125EF35I5ES 制造商:Altera Corporation 功能描述:FPGA Arria 制造商:Altera Corporation 功能描述:IC ARRIA II GX FPGA 制造商:Altera Corporation 功能描述:IC ARRIA II GX FPGA 1152FBGA