參數(shù)資料
型號: EP4S100G5F45I3
廠商: Altera
文件頁數(shù): 9/22頁
文件大?。?/td> 0K
描述: IC STRATIX IV FPGA 530K 1932FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 3
系列: STRATIX® IV GT
LAB/CLB數(shù): 21248
邏輯元件/單元數(shù): 531200
RAM 位總計: 28033024
輸入/輸出數(shù): 781
電源電壓: 0.92 V ~ 0.98 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 1932-BBGA
供應(yīng)商設(shè)備封裝: 1932-FBGA(45x45)
Chapter 1: Overview for the Stratix IV Device Family
1–17
Architecture Features
September 2012
Altera Corporation
10G Transceiver
Channels
(600 Mbps - 11.3 Gbps
with PMA + PCS)
12
24
32
8G Transceiver
Channels
(600 Mbps - 8.5 Gbps
with PMA + PCS) (1)
12
0
8
0
PMA-only CMU
Channels
(600 Mbps- 6.5 Gbps)
12
16
12
16
PCIe hard IP Blocks
2
4
2
4
High-Speed LVDS
SERDES
(up to 1.6 Gbps) (2)
46
47
46
47
SP1-4.2 Links
2
M9K Blocks
(256 x 36 bits)
1,235
1,280
1,235
936
1,248
1,280
M144K Blocks
(2048 x 72 bits)
22
64
22
36
48
64
Total Memory (MLAB +
M9K + M144K) Kb
17,133
27,376
17,133
17,248
22,564
27,376
Embedded Multipliers
18 x 18 (3)
1,288
1,024
1,288
832
1,024
PLLs
8
12
8
12
User I/Os (4), (5)
654
781
654
781
Speed Grade
(fastest to slowest)
–1, –2, –3
Notes to Table 1–7:
(1) You can configure all 10G transceiver channels as 8G transceiver channels. For example, the EP4S40G2F40 device has twenty-four 8G
transceiver channels and the EP4S100G5F45 device has thirty-two 8G transceiver channels.
(2) Total pairs of high-speed LVDS SERDES take the lowest channel count of RX/TX.
(3) Four multiplier adder mode.
(4) The user I/O count from the pin-out files include all general purpose I/Os, dedicated clock pins, and dual purpose configuration pins. Transceiver
pins and dedicated configuration pins are not included in the pin count.
(5) This data is preliminary.
Table 1–7. Stratix IV GT Device Features (Part 2 of 2)
Feature
EP4S40G2
EP4S40G5
EP4S100G2
EP4S100G3
EP4S100G4
EP4S100G5
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP4S100G5F45I3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4S100G5H40C2NES1 制造商:Altera Corporation 功能描述:IC FPGA 654 I/O 1517HBGA
EP4S100G5H40I1 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4S100G5H40I1N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4S100G5H40I2 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256