參數(shù)資料
型號(hào): EP4S100G5H40I2N
廠商: Altera
文件頁(yè)數(shù): 74/82頁(yè)
文件大小: 0K
描述: IC STRATIX IV GT 530K 1517HBGA
產(chǎn)品培訓(xùn)模塊: Stratix IV FPGAs
Three Reasons to Use FPGA's in Industrial Designs
特色產(chǎn)品: Stratix? IV Series FPGAs
標(biāo)準(zhǔn)包裝: 3
系列: STRATIX® IV GT
LAB/CLB數(shù): 21248
邏輯元件/單元數(shù): 531200
RAM 位總計(jì): 28033024
輸入/輸出數(shù): 654
電源電壓: 0.92 V ~ 0.98 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 1517-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 1517-HBGA(42.5x42.5)
其它名稱: 544-2636
1–68
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Glossary
Stratix IV Device Handbook
March 2014
Altera Corporation
Volume 4: Device Datasheet and Addendum
June 2011
5.1
Added military speed grade information.
Updated Table 1–1 and Table 1–30.
Updated (Note 3) in Table 1–42 and (Note 3) in Table 1–43.
Added military speed grade to Table 1–5, Table 1–10, Table 1–11, Table 1–23, Table 1–30,
Table 1–36, and Table 1–51.
April 2011
5.0
Updated Table 1–1, Table 1–5, Table 1–6, Table 1–13, Table 1–16, Table 1–23, and
Table 1–24.
March 2011
4.9
Updated Table 1–24.
March 2011
4.8
Removed (Note 17) in Table 1-24.
February 2011
4.7
Added (Note 17) to Table 1–24.
February 2011
4.6
Updated Table 1–1, Table 1–5, Table 1–23, Table 1–24, Table 1–30, Table 1–31, Table
1–32, Table 1–34, Table 1–37, Table 1–41, and Table 1–51.
Updated the “Recommended Operating Conditions” section.
Added the “Schmitt Trigger Input” section.March
Minor text edits.
November 2010
4.5
Updated Table 1–29.
Updated chapter title.
Minor text edits.
September 2010
4.4
Applied new template.
Updated Table 1–1 and Table 1–5.
July 2010
4.3
Updated Table 1–7, Table 1–22, Table 1–23, Table 1–33, Table 1–35, Table 1–36, and
Table 1–40.
Added Table 1–39.
Changed “PCI Express” to “PCIe” throughout.
Minor text edits
March 2010
4.2
Updated Table 1–22, Table 1–23, Table 1–30, Table 1–46, and Table 1–49.
Added Table 1–31.
Minor text edits.
February 2010
4.1
Updated Table 1–11, Table 1–22, Table 1–23, Table 1–24, Table 1–25, Table 1–26,
Table 1–27, Table 1–29, Table 1–32, Table 1–33, Table 1–34, Table 1–35, Table 1–39,
Table 1–40, Table 1–43, Table 1–46, and Table 1–49.
Added Stratix IV GT speed grade note to Table 1–32, Table 1–35, Table 1–39, Table 1–43,
Table 1–44, Table 1–45, and Table 1–46.
Added Table 1–28 and Table 1–30.
Minor text edits.
Table 1–55. Document Revision History (Part 2 of 3)
Date
Version
Changes
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP4S100G5H40I3 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4S100G5H40I3N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Stratix IV 21248 LABs 781 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4S40G2F40C2NES1 制造商:Altera Corporation 功能描述:IC STRATIX IV GT FPGA 1517FBGA
EP4S40G2F40I1 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Stratix IV 9120 LABs 654 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4S40G2F40I1N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Stratix IV 9120 LABs 654 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256