參數(shù)資料
型號(hào): EP4SE360H29I4N
廠商: Altera
文件頁數(shù): 25/82頁
文件大小: 0K
描述: IC STRATIX IV FPGA 360K 780HBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 3
系列: STRATIX® IV E
LAB/CLB數(shù): 14144
邏輯元件/單元數(shù): 353600
RAM 位總計(jì): 23105536
輸入/輸出數(shù): 488
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 780-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 780-HBGA(33x33)
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–23
Switching Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
-3 dB Bandwidth
PCIe Gen1
2.5 - 3.5
MHz
PCIe Gen2
6 - 8
MHz
(OIF) CEI PHY
at 4.976 Gbps
7 - 11
MHz
(OIF) CEI PHY
at 6.375 Gbps
5 - 10
MHz
XAUI
2 - 4
MHz
Serial RapidIO
1.25 Gbps
3 - 5.5
MHz
Serial RapidIO
2.5 Gbps
3 - 5.5
MHz
Serial RapidIO
3.125 Gbps
2 - 4
MHz
GIGE
2.5 - 4.5
MHz
SONET OC12
1.5 - 2.5
MHz
SONET OC48
3.5 - 6
MHz
ATX PLL (6G)
Supported Data
Range (16)
/L = 1
4800-5400 and
6000-6500
4800-5400 and
6000-6500
4800-5400 and
6000-6375
Mbps
/L = 2
2400-2700 and
3000-3250
2400-2700 and
3000-3250
2400-2700 and
3000-3187.5
Mbps
/L = 4
1200-1350 and
1500-1625
1200-1350 and
1500-1625
1200-1350 and
1500-1593.75
Mbps
-3 dB Bandwidth
PCIe Gen 2
1.5
MHz
(OIF) CEI PHY
at 6.375 Gbps
3 - 4.5
MHz
Transceiver-FPGA Fabric Interface
Interface speed
(non-PMA Direct)
25
325
25
325
25
250
MHz
Interface speed
(PMA Direct)
50
325
50
325
50
325
MHz
Table 1–23. Transceiver Specifications for Stratix IV GX Devices (Part 8 of 9)
Symbol/
Description
Conditions
–2 Commercial
Speed Grade
–3 Commercial/
Industrial and
–2× Commercial
Speed Grade (1)
–3 Military (2)
and –4
Commercial/Industrial
Speed Grade
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
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