參數(shù)資料
型號: EP4SE530H35C3N
廠商: Altera
文件頁數(shù): 3/82頁
文件大小: 0K
描述: IC STRATIX IV E 530K 1152HBGA
產(chǎn)品培訓(xùn)模塊: Stratix IV FPGAs
Three Reasons to Use FPGA's in Industrial Designs
特色產(chǎn)品: Stratix? IV Series FPGAs
標準包裝: 3
系列: STRATIX® IV E
LAB/CLB數(shù): 21248
邏輯元件/單元數(shù): 531200
RAM 位總計: 28033024
輸入/輸出數(shù): 744
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1152-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 1152-HBGA(40x40)
其它名稱: 544-2632
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–3
Electrical Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Table 1–3. Transceiver Power Supply Absolute Maximum Ratings for Stratix IV GT Devices (1)
Symbol
Description
Minimum
Maximum
Unit
VCCA_L
Transceiver high voltage power (left side)
-0.5
3.75
V
VCCA_R
Transceiver high voltage power (right side)
-0.5
3.75
V
VCCHIP_L
Transceiver HIP digital power (left side)
-0.5
1.35
V
VCCHIP_R
Transceiver HIP digital power (right side)
-0.5
1.35
V
VCCR_L
Receiver power (left side)
-0.5
1.35
V
VCCR_R
Receiver power (right side)
-0.5
1.35
V
VCCT_L
Transmitter power (left side)
-0.5
1.35
V
VCCT_R
Transmitter power (right side)
-0.5
1.35
V
VCCL_GXBLn (2)
Transceiver clock power (left side)
-0.5
1.35
V
VCCL_GXBRn (2)
Transceiver clock power (right side)
-0.5
1.35
V
VCCH_GXBLn (2)
Transmitter output buffer power (left side)
-0.5
1.8
V
VCCH_GXBRn (2)
Transmitter output buffer power (right side)
-0.5
1.8
V
Notes to Table 1–3:
(1) For the absolute maximum ratings for Stratix IV GT engineering sample (ES1) devices, contact your local Altera sales representative.
(2) n = 0, 1, 2, or 3.
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