參數(shù)資料
型號(hào)： EP4SGX180KF40I4N
廠商： Altera
文件頁(yè)數(shù)： 73/82頁(yè)
文件大?。?/td> 0K
描述： IC STRATIX IV FPGA 180K 1517FBGA
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝： 3
系列： Stratix® IV GX
LAB/CLB數(shù)： 7030
邏輯元件/單元數(shù)： 175750
RAM 位總計(jì)： 13954048
輸入/輸出數(shù)： 744
電源電壓： 0.87 V ~ 0.93 V
安裝類(lèi)型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 1517-BBGA
供應(yīng)商設(shè)備封裝： 1517-FBGA（40x40）
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–67
Glossary
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Document Revision History
Table 1–55 lists the revision history for this chapter.
V
VCM(DC)
DC Common mode input voltage.
VICM
Input Common mode voltage—The common mode of the differential signal at the receiver.
VID
Input differential voltage swing—The difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
VDIF(AC)
AC differential input voltage—Minimum AC input differential voltage required for switching.
VDIF(DC)
DC differential input voltage— Minimum DC input differential voltage required for switching.
VIH
Voltage input high—The minimum positive voltage applied to the input which is accepted by
the device as a logic high.
VIH(AC)
High-level AC input voltage
VIH(DC)
High-level DC input voltage
VIL
Voltage input low—The maximum positive voltage applied to the input which is accepted by
the device as a logic low.
VIL(AC)
Low-level AC input voltage
VIL(DC)
Low-level DC input voltage
VOCM
Output Common mode voltage—The common mode of the differential signal at the
transmitter.
VOD
Output differential voltage swing—The difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter.
VSWING
Differential input voltage
VX
Input differential cross point voltage
VOX
Output differential cross point voltage
W
W
High-speed I/O block: Clock Boost Factor
X, Y, Z
——
Table 1–54. Glossary Table (Part 4 of 4)
Letter
Subject
Definitions
Table 1–55. Document Revision History (Part 1 of 3)
Date
Version
Changes
March 2014
5.8
■ Added note to Table 1–49.
■ Updated D6 row in Table 1–52.
January 2014
5.7
■ Updated Table 1–42.
December 2013
5.6
■ Updated Table 1–23 and Table 1–24.
November 2013
5.5
■ Updated Table 1–23 and Table 1–24.
November 2013
5.4
■ Updated Table 1–42, Table 1–23, and Table 1–24.
July 2012
5.3
■ Added Table 1–5 and Table 1–40.
■ Updated Table 1–15, Table 1–22, Table 1–23, Table 1–30, Table 1–33, Table 1–35,
Table 1–36, Table 1–39, Table 1–42 and Table 1–51.
■ Removed “Schmitt Trigger Input” section.
December 2011
5.2
■ Added Figure 1–7.
■ Updated Table 1–22 and Table 1–41.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP4SGX230 制造商:ALTERA 制造商全稱(chēng):Altera Corporation 功能描述:Stratix IV Device
EP4SGX230DF29C2NES 制造商:Altera Corporation 功能描述:IC FPGA 372 I/O 780FBGA 制造商:Altera Corporation 功能描述:IC STRATIX IV GX FPGA 780FBGA
EP4SGX230DF29C2X 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Stratix IV GX 9120 LABs 372 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX230DF29C2XES 制造商:Altera Corporation 功能描述:IC FPGA 372 I/O 780FBGA 制造商:Altera Corporation 功能描述:IC STRATIX IV GX FPGA 780FBGA
EP4SGX230DF29C2XN 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Stratix IV GX 9120 LABs 372 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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