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參數(shù)資料
| 型號： | EPCS16SI8N |
| 廠商： | Altera |
| 文件頁數(shù)： | 12/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONFIG DEVICE 16MBIT 8-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Three Reasons to Use FPGA's in Industrial Designs |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 系列： | EPCS |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 存儲容量： | 16Mb |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 604 (CN2011-ZH PDF) |
| 其它名稱： | 544-2567-5 |
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Page 2
Functional Description
Serial Configuration (EPCS) Devices Datasheet
January 2014
Altera Corporation
■
Enables the Nios processor to access unused flash memory through AS memory
interface
■
Reprogrammable memory with more than 100,000 erase or program cycles
■
Write protection support for memory sectors using status register bits
■
In-system programming (ISP) support with SRunner software driver
■
ISP support with USB-Blaster, EthernetBlaster, or ByteBlaster II download cables
■
Additional programming support with the APU and programming hardware
from BP Microsystems, System General, and other vendors
■
By default, the memory array is erased and the bits are set to 1
Functional Description
To configure a system using an SRAM-based device, each time you power on the
device, you must load the configuration data. The EPCS device is a flash memory
device that can store configuration data that you use for FPGA configuration purpose
after power on. You can use the EPCS device on all FPGA that support AS x1
configuration scheme.
For an 8-pin SOIC package, you can migrate vertically from the EPCS1 device to the
EPCS4 or EPCS16 device. For a 16-pin SOIC package, you can migrate vertically from
the EPCS64 device to the EPCS128 device.
With the new data decompression feature supported, you can determine using which
EPCS device to store the configuration data for configuring your FPGA.
Example 1 shows how you can calculate the compression ratio to determine which
EPCS device is suitable for the FPGA.
f For more information about the FPGA decompression feature, refer to the
configuration chapter in the appropriate device handbook.
Example 1. Compression Ratio Calculation
EP4SGX530 = 189,000,000 bits
EPCS128 = 134,217,728 bits
Preliminary data indicates that compression typically reduces the
configuration bitstream size by 35% to 55%. Assume worst case that is 35%
decompression.
189,000,000 bits x 0.65 = 122,850,000 bits
The EPCS128 device is suitable.
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| EPCS1SI8 | 功能描述:FPGA-配置存儲器 IC - Ser. Config Mem Flash 1Mb 40 MHz RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| EPCS1SI8N | 功能描述:FPGA-配置存儲器 IC - Ser. Config Mem Flash 1Mb 40 MHz RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
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