參數(shù)資料
型號: EPCS1SI8N
廠商: Altera
文件頁數(shù): 32/40頁
文件大小: 0K
描述: IC CONFIG DEVICE 1MBIT 8-SOIC
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 100
系列: EPCS
可編程類型: 系統(tǒng)內(nèi)可編程
存儲容量: 1Mb
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
產(chǎn)品目錄頁面: 604 (CN2011-ZH PDF)
其它名稱: 544-1242-5
Page 38
Document Revision History
Serial Configuration (EPCS) Devices Datasheet
January 2014
Altera Corporation
Document Revision History
Table 25 lists the revision history for this document.
Table 25. Document Revision History (Part 1 of 3)
Date
Version
Changes
January 2014
5.0
Added Table 12 to include the block protection bits for EPCS64 devices.
Updated DCLK fMAX for the read status and read silicon ID operations to
32 MHz in Table 8.
Updated tCH, tCL, and tODIS values in the read operation parameters in Table 17.
Updated the “Package” section to include device migration information.
January 2012
4.0
Updated “Package” and “Ordering Code” sections.
Updated Figure 5, Figure 6, and Figure 22.
Updated Table 16 and Table 18.
Minor text edits.
June 2011
3.4
Updated Table 3–19.
Updated Figure 3–20.
December 2009
3.3
Updated “Features” and “Functional Description” sections.
Added “Fast Read Operation” section.
Removed Table 4–2 to Table 4–9, Table 4-26, and Table 4–33.
Updated Table 3–1.
Updated Figure 3–2.
Removed “Referenced Documents” section.
October 2008
3.2
Updated “Introduction”, “Active Serial FPGA Configuration”, “Operation
Codes”, “Read Status Operation”, “Read Device Identification Operation”, and
“Package” sections.
Updated Table 4–10, Table 4–25, Table 4–26, and Table 4–32.
Updated Figure 4–5, Figure 4–13, and Figure 4–19.
Added Figure 4–22.
Added Table 4–33.
Updated new document format.
May 2008
3.1
Updated Table 4–3, Table 4–6, Table 4–7, Table 4–28, and Table 4–29.
Deleted Note 5 to Table 4–31.
Added “Referenced Documents” section.
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