Notes to tables: (1) All timing parameters are described in Tabl" />
參數(shù)資料
型號: EPF10K100EQC240-2N
廠商: Altera
文件頁數(shù): 66/100頁
文件大?。?/td> 0K
描述: IC FLEX 10KE FPGA 100K 240-PQFP
產(chǎn)品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 24
系列: FLEX-10KE®
LAB/CLB數(shù): 624
邏輯元件/單元數(shù): 4992
RAM 位總計: 49152
輸入/輸出數(shù): 189
門數(shù): 257000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 240-BFQFP
供應商設備封裝: 240-PQFP(32x32)
68
Altera Corporation
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Notes to tables:
(1)
All timing parameters are described in Tables 24 through 30 in this data sheet.
(2)
These parameters are specified by characterization.
(3)
This parameter is measured without the use of the ClockLock or ClockBoost circuits.
(4)
This parameter is measured with the use of the ClockLock or ClockBoost circuits.
Tables 38 through 44 show EPF10K50E device internal and external
timing parameters.
Table 37. EPF10K30E External Bidirectional Timing Parameters
Symbol
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
tINSUBIDIR (3)
2.8
3.9
5.2
ns
tINHBIDIR (3)
0.0
ns
tINSUBIDIR (4)
3.8
4.9
ns
tINHBIDIR (4)
0.0
ns
tOUTCOBIDIR (3)
2.0
4.9
2.0
5.9
2.0
7.6
ns
tXZBIDIR (3)
6.1
7.5
9.7
ns
tZXBIDIR (3)
6.1
7.5
9.7
ns
tOUTCOBIDIR (4)
0.5
3.9
0.5
4.9
ns
tXZBIDIR (4)
5.1
6.5
ns
tZXBIDIR (4)
5.1
6.5
ns
Table 38. EPF10K50E Device LE Timing Microparameters (Part 1 of 2)
Symbol
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
tLUT
0.6
0.9
1.3
ns
tCLUT
0.5
0.6
0.8
ns
tRLUT
0.7
0.8
1.1
ns
tPACKED
0.4
0.5
0.6
ns
tEN
0.6
0.7
0.9
ns
tCICO
0.2
0.3
ns
tCGEN
0.5
0.8
ns
tCGENR
0.2
0.3
ns
tCASC
0.8
1.0
1.4
ns
tC
0.5
0.6
0.8
ns
tCO
0.7
0.9
ns
tCOMB
0.5
0.6
0.8
ns
tSU
0.7
0.8
ns
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